aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-vexpress/include
diff options
context:
space:
mode:
authorPawel Moll <pawel.moll@arm.com>2012-10-09 07:56:36 -0400
committerPawel Moll <pawel.moll@arm.com>2012-11-05 12:09:51 -0500
commit38669e045dbf8f62a008898a7fb1e93975b3817c (patch)
treeb989816e1a4625729189c08eb08367bc73b268ff /arch/arm/mach-vexpress/include
parent842839a37a9a9ac12d88930b6605c620fc09bc1d (diff)
ARM: vexpress: Start using new Versatile Express infrastructure
This patch starts using all the configuration infrastructure. - generic GPIO library is forced now - sysreg GPIOs are used as MMC CD and WP information sources; thanks to this MMCI auxiliary data is not longer necessary - DVI muxer and mode control is removed from non-DT V2P-CA9 code as this is now handled by the vexpress-dvi driver - clock generators control is removed as is being handled by the common clock driver now - the sysreg and sysctl control is now delegated to the appropriate drivers and all related code was removed - NOR Flash set_vpp function has been removed as the control bit used does _not_ control its VPP line, but the #WP signal instead (which is de facto unusable in case of Linux MTD drivers); this also allowed the remove its DT auxiliary data The non-DT code defines only minimal required number of the config devices. Device Trees are updated to make use of all new features. Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Diffstat (limited to 'arch/arm/mach-vexpress/include')
-rw-r--r--arch/arm/mach-vexpress/include/mach/motherboard.h81
1 files changed, 0 insertions, 81 deletions
diff --git a/arch/arm/mach-vexpress/include/mach/motherboard.h b/arch/arm/mach-vexpress/include/mach/motherboard.h
index 1e388c7bf4d7..68abc8b72781 100644
--- a/arch/arm/mach-vexpress/include/mach/motherboard.h
+++ b/arch/arm/mach-vexpress/include/mach/motherboard.h
@@ -1,8 +1,6 @@
1#ifndef __MACH_MOTHERBOARD_H 1#ifndef __MACH_MOTHERBOARD_H
2#define __MACH_MOTHERBOARD_H 2#define __MACH_MOTHERBOARD_H
3 3
4#include <linux/clk-provider.h>
5
6/* 4/*
7 * Physical addresses, offset from V2M_PA_CS0-3 5 * Physical addresses, offset from V2M_PA_CS0-3
8 */ 6 */
@@ -41,31 +39,6 @@
41#define V2M_CF (V2M_PA_CS7 + 0x0001a000) 39#define V2M_CF (V2M_PA_CS7 + 0x0001a000)
42#define V2M_CLCD (V2M_PA_CS7 + 0x0001f000) 40#define V2M_CLCD (V2M_PA_CS7 + 0x0001f000)
43 41
44/*
45 * Offsets from SYSREGS base
46 */
47#define V2M_SYS_ID 0x000
48#define V2M_SYS_SW 0x004
49#define V2M_SYS_LED 0x008
50#define V2M_SYS_100HZ 0x024
51#define V2M_SYS_FLAGS 0x030
52#define V2M_SYS_FLAGSSET 0x030
53#define V2M_SYS_FLAGSCLR 0x034
54#define V2M_SYS_NVFLAGS 0x038
55#define V2M_SYS_NVFLAGSSET 0x038
56#define V2M_SYS_NVFLAGSCLR 0x03c
57#define V2M_SYS_MCI 0x048
58#define V2M_SYS_FLASH 0x03c
59#define V2M_SYS_CFGSW 0x058
60#define V2M_SYS_24MHZ 0x05c
61#define V2M_SYS_MISC 0x060
62#define V2M_SYS_DMA 0x064
63#define V2M_SYS_PROCID0 0x084
64#define V2M_SYS_PROCID1 0x088
65#define V2M_SYS_CFGDATA 0x0a0
66#define V2M_SYS_CFGCTRL 0x0a4
67#define V2M_SYS_CFGSTAT 0x0a8
68
69 42
70/* 43/*
71 * Interrupts. Those in {} are for AMBA devices 44 * Interrupts. Those in {} are for AMBA devices
@@ -91,43 +64,6 @@
91 64
92 65
93/* 66/*
94 * Configuration
95 */
96#define SYS_CFG_START (1 << 31)
97#define SYS_CFG_WRITE (1 << 30)
98#define SYS_CFG_OSC (1 << 20)
99#define SYS_CFG_VOLT (2 << 20)
100#define SYS_CFG_AMP (3 << 20)
101#define SYS_CFG_TEMP (4 << 20)
102#define SYS_CFG_RESET (5 << 20)
103#define SYS_CFG_SCC (6 << 20)
104#define SYS_CFG_MUXFPGA (7 << 20)
105#define SYS_CFG_SHUTDOWN (8 << 20)
106#define SYS_CFG_REBOOT (9 << 20)
107#define SYS_CFG_DVIMODE (11 << 20)
108#define SYS_CFG_POWER (12 << 20)
109#define SYS_CFG_SITE(n) ((n) << 16)
110#define SYS_CFG_SITE_MB 0
111#define SYS_CFG_SITE_DB1 1
112#define SYS_CFG_SITE_DB2 2
113#define SYS_CFG_STACK(n) ((n) << 12)
114
115#define SYS_CFG_ERR (1 << 1)
116#define SYS_CFG_COMPLETE (1 << 0)
117
118int v2m_cfg_write(u32 devfn, u32 data);
119int v2m_cfg_read(u32 devfn, u32 *data);
120void v2m_flags_set(u32 data);
121
122/*
123 * Miscellaneous
124 */
125#define SYS_MISC_MASTERSITE (1 << 14)
126#define SYS_PROCIDx_HBI_MASK 0xfff
127
128int v2m_get_master_site(void);
129
130/*
131 * Core tile IDs 67 * Core tile IDs
132 */ 68 */
133#define V2M_CT_ID_CA9 0x0c000191 69#define V2M_CT_ID_CA9 0x0c000191
@@ -149,21 +85,4 @@ struct ct_desc {
149 85
150extern struct ct_desc *ct_desc; 86extern struct ct_desc *ct_desc;
151 87
152/*
153 * OSC clock provider
154 */
155struct v2m_osc {
156 struct clk_hw hw;
157 u8 site; /* 0 = motherboard, 1 = site 1, 2 = site 2 */
158 u8 stack; /* board stack position */
159 u16 osc;
160 unsigned long rate_min;
161 unsigned long rate_max;
162 unsigned long rate_default;
163};
164
165#define to_v2m_osc(osc) container_of(osc, struct v2m_osc, hw)
166
167struct clk *v2m_osc_register(const char *name, struct v2m_osc *osc);
168
169#endif 88#endif