diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-01-26 14:59:44 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-01-26 14:59:44 -0500 |
commit | dcf81c1af839b77b44404453ecae6e5ac5a75f05 (patch) | |
tree | 289dcbda5fbca34e7e0cf028908b9b517fa8b8b2 /arch/arm/mach-versatile | |
parent | 34e5f4f198ddd36a82dc12164de7fc4f5430e09d (diff) | |
parent | 75c06963dd947252271ffa6107a25cddb2b8f362 (diff) |
Merge branch 'amba' into for-armsoc
Diffstat (limited to 'arch/arm/mach-versatile')
-rw-r--r-- | arch/arm/mach-versatile/core.c | 70 | ||||
-rw-r--r-- | arch/arm/mach-versatile/core.h | 20 | ||||
-rw-r--r-- | arch/arm/mach-versatile/versatile_pb.c | 18 |
3 files changed, 49 insertions, 59 deletions
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 02b7b9303f3b..4f352e45be0a 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c | |||
@@ -582,58 +582,58 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
582 | .num_chipselect = 1, | 582 | .num_chipselect = 1, |
583 | }; | 583 | }; |
584 | 584 | ||
585 | #define AACI_IRQ { IRQ_AACI, NO_IRQ } | 585 | #define AACI_IRQ { IRQ_AACI } |
586 | #define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } | 586 | #define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } |
587 | #define KMI0_IRQ { IRQ_SIC_KMI0, NO_IRQ } | 587 | #define KMI0_IRQ { IRQ_SIC_KMI0 } |
588 | #define KMI1_IRQ { IRQ_SIC_KMI1, NO_IRQ } | 588 | #define KMI1_IRQ { IRQ_SIC_KMI1 } |
589 | 589 | ||
590 | /* | 590 | /* |
591 | * These devices are connected directly to the multi-layer AHB switch | 591 | * These devices are connected directly to the multi-layer AHB switch |
592 | */ | 592 | */ |
593 | #define SMC_IRQ { NO_IRQ, NO_IRQ } | 593 | #define SMC_IRQ { } |
594 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 594 | #define MPMC_IRQ { } |
595 | #define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ } | 595 | #define CLCD_IRQ { IRQ_CLCDINT } |
596 | #define DMAC_IRQ { IRQ_DMAINT, NO_IRQ } | 596 | #define DMAC_IRQ { IRQ_DMAINT } |
597 | 597 | ||
598 | /* | 598 | /* |
599 | * These devices are connected via the core APB bridge | 599 | * These devices are connected via the core APB bridge |
600 | */ | 600 | */ |
601 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 601 | #define SCTL_IRQ { } |
602 | #define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ } | 602 | #define WATCHDOG_IRQ { IRQ_WDOGINT } |
603 | #define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ } | 603 | #define GPIO0_IRQ { IRQ_GPIOINT0 } |
604 | #define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ } | 604 | #define GPIO1_IRQ { IRQ_GPIOINT1 } |
605 | #define RTC_IRQ { IRQ_RTCINT, NO_IRQ } | 605 | #define RTC_IRQ { IRQ_RTCINT } |
606 | 606 | ||
607 | /* | 607 | /* |
608 | * These devices are connected via the DMA APB bridge | 608 | * These devices are connected via the DMA APB bridge |
609 | */ | 609 | */ |
610 | #define SCI_IRQ { IRQ_SCIINT, NO_IRQ } | 610 | #define SCI_IRQ { IRQ_SCIINT } |
611 | #define UART0_IRQ { IRQ_UARTINT0, NO_IRQ } | 611 | #define UART0_IRQ { IRQ_UARTINT0 } |
612 | #define UART1_IRQ { IRQ_UARTINT1, NO_IRQ } | 612 | #define UART1_IRQ { IRQ_UARTINT1 } |
613 | #define UART2_IRQ { IRQ_UARTINT2, NO_IRQ } | 613 | #define UART2_IRQ { IRQ_UARTINT2 } |
614 | #define SSP_IRQ { IRQ_SSPINT, NO_IRQ } | 614 | #define SSP_IRQ { IRQ_SSPINT } |
615 | 615 | ||
616 | /* FPGA Primecells */ | 616 | /* FPGA Primecells */ |
617 | AMBA_DEVICE(aaci, "fpga:04", AACI, NULL); | 617 | APB_DEVICE(aaci, "fpga:04", AACI, NULL); |
618 | AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &mmc0_plat_data); | 618 | APB_DEVICE(mmc0, "fpga:05", MMCI0, &mmc0_plat_data); |
619 | AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL); | 619 | APB_DEVICE(kmi0, "fpga:06", KMI0, NULL); |
620 | AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL); | 620 | APB_DEVICE(kmi1, "fpga:07", KMI1, NULL); |
621 | 621 | ||
622 | /* DevChip Primecells */ | 622 | /* DevChip Primecells */ |
623 | AMBA_DEVICE(smc, "dev:00", SMC, NULL); | 623 | AHB_DEVICE(smc, "dev:00", SMC, NULL); |
624 | AMBA_DEVICE(mpmc, "dev:10", MPMC, NULL); | 624 | AHB_DEVICE(mpmc, "dev:10", MPMC, NULL); |
625 | AMBA_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data); | 625 | AHB_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data); |
626 | AMBA_DEVICE(dmac, "dev:30", DMAC, NULL); | 626 | AHB_DEVICE(dmac, "dev:30", DMAC, NULL); |
627 | AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL); | 627 | APB_DEVICE(sctl, "dev:e0", SCTL, NULL); |
628 | AMBA_DEVICE(wdog, "dev:e1", WATCHDOG, NULL); | 628 | APB_DEVICE(wdog, "dev:e1", WATCHDOG, NULL); |
629 | AMBA_DEVICE(gpio0, "dev:e4", GPIO0, &gpio0_plat_data); | 629 | APB_DEVICE(gpio0, "dev:e4", GPIO0, &gpio0_plat_data); |
630 | AMBA_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data); | 630 | APB_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data); |
631 | AMBA_DEVICE(rtc, "dev:e8", RTC, NULL); | 631 | APB_DEVICE(rtc, "dev:e8", RTC, NULL); |
632 | AMBA_DEVICE(sci0, "dev:f0", SCI, NULL); | 632 | APB_DEVICE(sci0, "dev:f0", SCI, NULL); |
633 | AMBA_DEVICE(uart0, "dev:f1", UART0, NULL); | 633 | APB_DEVICE(uart0, "dev:f1", UART0, NULL); |
634 | AMBA_DEVICE(uart1, "dev:f2", UART1, NULL); | 634 | APB_DEVICE(uart1, "dev:f2", UART1, NULL); |
635 | AMBA_DEVICE(uart2, "dev:f3", UART2, NULL); | 635 | APB_DEVICE(uart2, "dev:f3", UART2, NULL); |
636 | AMBA_DEVICE(ssp0, "dev:f4", SSP, &ssp0_plat_data); | 636 | APB_DEVICE(ssp0, "dev:f4", SSP, &ssp0_plat_data); |
637 | 637 | ||
638 | static struct amba_device *amba_devs[] __initdata = { | 638 | static struct amba_device *amba_devs[] __initdata = { |
639 | &dmac_device, | 639 | &dmac_device, |
diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h index 2ef2f555f315..683e60776a85 100644 --- a/arch/arm/mach-versatile/core.h +++ b/arch/arm/mach-versatile/core.h | |||
@@ -36,20 +36,10 @@ extern unsigned int mmc_status(struct device *dev); | |||
36 | extern struct of_dev_auxdata versatile_auxdata_lookup[]; | 36 | extern struct of_dev_auxdata versatile_auxdata_lookup[]; |
37 | #endif | 37 | #endif |
38 | 38 | ||
39 | #define AMBA_DEVICE(name,busid,base,plat) \ | 39 | #define APB_DEVICE(name, busid, base, plat) \ |
40 | static struct amba_device name##_device = { \ | 40 | static AMBA_APB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat) |
41 | .dev = { \ | 41 | |
42 | .coherent_dma_mask = ~0, \ | 42 | #define AHB_DEVICE(name, busid, base, plat) \ |
43 | .init_name = busid, \ | 43 | static AMBA_AHB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat) |
44 | .platform_data = plat, \ | ||
45 | }, \ | ||
46 | .res = { \ | ||
47 | .start = VERSATILE_##base##_BASE, \ | ||
48 | .end = (VERSATILE_##base##_BASE) + SZ_4K - 1,\ | ||
49 | .flags = IORESOURCE_MEM, \ | ||
50 | }, \ | ||
51 | .dma_mask = ~0, \ | ||
52 | .irq = base##_IRQ, \ | ||
53 | } | ||
54 | 44 | ||
55 | #endif | 45 | #endif |
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c index 9581c197500c..19738331bd3d 100644 --- a/arch/arm/mach-versatile/versatile_pb.c +++ b/arch/arm/mach-versatile/versatile_pb.c | |||
@@ -58,28 +58,28 @@ static struct pl061_platform_data gpio3_plat_data = { | |||
58 | .irq_base = IRQ_GPIO3_START, | 58 | .irq_base = IRQ_GPIO3_START, |
59 | }; | 59 | }; |
60 | 60 | ||
61 | #define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ } | 61 | #define UART3_IRQ { IRQ_SIC_UART3 } |
62 | #define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ } | 62 | #define SCI1_IRQ { IRQ_SIC_SCI3 } |
63 | #define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } | 63 | #define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } |
64 | 64 | ||
65 | /* | 65 | /* |
66 | * These devices are connected via the core APB bridge | 66 | * These devices are connected via the core APB bridge |
67 | */ | 67 | */ |
68 | #define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ } | 68 | #define GPIO2_IRQ { IRQ_GPIOINT2 } |
69 | #define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ } | 69 | #define GPIO3_IRQ { IRQ_GPIOINT3 } |
70 | 70 | ||
71 | /* | 71 | /* |
72 | * These devices are connected via the DMA APB bridge | 72 | * These devices are connected via the DMA APB bridge |
73 | */ | 73 | */ |
74 | 74 | ||
75 | /* FPGA Primecells */ | 75 | /* FPGA Primecells */ |
76 | AMBA_DEVICE(uart3, "fpga:09", UART3, NULL); | 76 | APB_DEVICE(uart3, "fpga:09", UART3, NULL); |
77 | AMBA_DEVICE(sci1, "fpga:0a", SCI1, NULL); | 77 | APB_DEVICE(sci1, "fpga:0a", SCI1, NULL); |
78 | AMBA_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data); | 78 | APB_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data); |
79 | 79 | ||
80 | /* DevChip Primecells */ | 80 | /* DevChip Primecells */ |
81 | AMBA_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data); | 81 | APB_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data); |
82 | AMBA_DEVICE(gpio3, "dev:e7", GPIO3, &gpio3_plat_data); | 82 | APB_DEVICE(gpio3, "dev:e7", GPIO3, &gpio3_plat_data); |
83 | 83 | ||
84 | static struct amba_device *amba_devs[] __initdata = { | 84 | static struct amba_device *amba_devs[] __initdata = { |
85 | &uart3_device, | 85 | &uart3_device, |