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authorLinus Walleij <linus.walleij@linaro.org>2013-11-14 04:27:40 -0500
committerLinus Walleij <linus.walleij@linaro.org>2013-11-26 15:01:55 -0500
commit38656820aa31e853c7bfbe2658cc8a78e303583b (patch)
tree6950287124439587b5305e7d78ebecf27b8fb3e2 /arch/arm/mach-ux500
parenta12f703c5a27e2061fd0ea77200e5e2f8cfee54b (diff)
ARM: ux500: move SPI pin config to device tree
This moves the SPI pin control table out of the board file and into the device tree. Move the specific setting for SSP0 on the HREFprev60 into the prev60-specific DTS file. The SPI2 configuration is not really connected to any device, as it will conflict with GPIO218 which is used on all HREFs. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-ux500')
-rw-r--r--arch/arm/mach-ux500/board-mop500-pins.c19
1 files changed, 0 insertions, 19 deletions
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index a6d431bd0659..8fba58c98da2 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -342,22 +342,6 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
342 /* LCD VSI1 sleep state */ 342 /* LCD VSI1 sleep state */
343 DB8500_PIN_SLEEP("GPIO69_E2", slpm_in_wkup_pdis, "0-0070"), 343 DB8500_PIN_SLEEP("GPIO69_E2", slpm_in_wkup_pdis, "0-0070"),
344 344
345 /* Mux in SPI2 pins on the "other C1" altfunction */
346 DB8500_MUX("spi2_oc1_2", "spi2", "spi2"),
347 DB8500_PIN("GPIO216_AG12", gpio_out_hi, "spi2"), /* FRM */
348 DB8500_PIN("GPIO218_AH11", in_pd, "spi2"), /* RXD */
349 DB8500_PIN("GPIO215_AH13", out_lo, "spi2"), /* TXD */
350 DB8500_PIN("GPIO217_AH12", out_lo, "spi2"), /* CLK */
351 /* SPI2 idle state */
352 DB8500_PIN_IDLE("GPIO218_AH11", slpm_in_wkup_pdis, "spi2"), /* RXD */
353 DB8500_PIN_IDLE("GPIO215_AH13", slpm_out_lo_wkup_pdis, "spi2"), /* TXD */
354 DB8500_PIN_IDLE("GPIO217_AH12", slpm_wkup_pdis, "spi2"), /* CLK */
355 /* SPI2 sleep state */
356 DB8500_PIN_SLEEP("GPIO216_AG12", slpm_in_wkup_pdis, "spi2"), /* FRM */
357 DB8500_PIN_SLEEP("GPIO218_AH11", slpm_in_wkup_pdis, "spi2"), /* RXD */
358 DB8500_PIN_SLEEP("GPIO215_AH13", slpm_out_lo_wkup_pdis, "spi2"), /* TXD */
359 DB8500_PIN_SLEEP("GPIO217_AH12", slpm_wkup_pdis, "spi2"), /* CLK */
360
361 /* ske default state */ 345 /* ske default state */
362 DB8500_MUX("kp_a_2", "kp", "nmk-ske-keypad"), 346 DB8500_MUX("kp_a_2", "kp", "nmk-ske-keypad"),
363 DB8500_PIN("GPIO153_B17", in_pd, "nmk-ske-keypad"), /* I7 */ 347 DB8500_PIN("GPIO153_B17", in_pd, "nmk-ske-keypad"), /* I7 */
@@ -582,9 +566,6 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
582 * on-chip pins as the HREFv60 and later does. 566 * on-chip pins as the HREFv60 and later does.
583 */ 567 */
584static struct pinctrl_map __initdata mop500_pinmap[] = { 568static struct pinctrl_map __initdata mop500_pinmap[] = {
585 /* Mux in SSP0, pull down RXD pin */
586 DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
587 DB8500_PIN_HOG("GPIO145_C13", pd),
588 /* 569 /*
589 * XENON Flashgun on image processor GPIO (controlled from image 570 * XENON Flashgun on image processor GPIO (controlled from image
590 * processor firmware), mux in these image processor GPIO lines 0 571 * processor firmware), mux in these image processor GPIO lines 0