diff options
author | Philippe Begnic <philippe.begnic@st.com> | 2013-05-27 08:41:29 -0400 |
---|---|---|
committer | Mike Turquette <mturquette@linaro.org> | 2013-06-06 21:16:04 -0400 |
commit | 1237e598a94b5a44a0162a4f4534d18ef8a81a7d (patch) | |
tree | 819febac1b0cc844509deedd3068977a43e93f58 /arch/arm/mach-ux500 | |
parent | 88235988d7ff394f77c0a5a8a9803962d0026ef1 (diff) |
clk: ux500: Pass clock base adresses in initcall for u8540 and u9540
Align on u8500 version, pass clock base address in clk_init functions
for u8540 and u9540.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Philippe Begnic <philippe.begnic@st.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'arch/arm/mach-ux500')
-rw-r--r-- | arch/arm/mach-ux500/cpu.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index b6145ea51641..e6fb0239151b 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c | |||
@@ -76,13 +76,15 @@ void __init ux500_init_irq(void) | |||
76 | } else if (cpu_is_u9540()) { | 76 | } else if (cpu_is_u9540()) { |
77 | prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1); | 77 | prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1); |
78 | ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1); | 78 | ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1); |
79 | u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE, | 79 | u9540_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE, |
80 | U8500_CLKRST3_BASE, U8500_CLKRST5_BASE, | 80 | U8500_CLKRST3_BASE, U8500_CLKRST5_BASE, |
81 | U8500_CLKRST6_BASE); | 81 | U8500_CLKRST6_BASE); |
82 | } else if (cpu_is_u8540()) { | 82 | } else if (cpu_is_u8540()) { |
83 | prcmu_early_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1); | 83 | prcmu_early_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1); |
84 | ux500_pm_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1); | 84 | ux500_pm_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1); |
85 | u8540_clk_init(); | 85 | u8540_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE, |
86 | U8500_CLKRST3_BASE, U8500_CLKRST5_BASE, | ||
87 | U8500_CLKRST6_BASE); | ||
86 | } | 88 | } |
87 | } | 89 | } |
88 | 90 | ||