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authorRabin Vincent <rabin.vincent@stericsson.com>2010-02-28 23:05:56 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-03-19 14:29:45 -0400
commit75a36ee01e860be693220f1c40e2c04fb6cc69ba (patch)
tree7a4dc1f66d6d4621ac82dceb8829503c6118c283 /arch/arm/mach-ux500/include
parentcc2c13342508d52cf08ea81f639b5de69607fd5d (diff)
ARM: 5963/1: ux500: add support for u8500 v1 revision
Add cpu_is_u8500{ed/v1}() functions to determine the variant based on the CPU id, add the changed peripheral addresses, and fixup the MTU address. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-ux500/include')
-rw-r--r--arch/arm/mach-ux500/include/mach/hardware.h29
1 files changed, 24 insertions, 5 deletions
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h
index 04ea836969b3..f29a43d9d45a 100644
--- a/arch/arm/mach-ux500/include/mach/hardware.h
+++ b/arch/arm/mach-ux500/include/mach/hardware.h
@@ -56,16 +56,19 @@
56#define U8500_TWD_SIZE 0x100 56#define U8500_TWD_SIZE 0x100
57 57
58/* per7 base addressess */ 58/* per7 base addressess */
59#define U8500_CR_BASE (U8500_PER7_BASE + 0x8000) 59#define U8500_CR_BASE_ED (U8500_PER7_BASE + 0x8000)
60#define U8500_MTU0_BASE (U8500_PER7_BASE + 0xa000) 60#define U8500_MTU0_BASE_ED (U8500_PER7_BASE + 0xa000)
61#define U8500_MTU1_BASE (U8500_PER7_BASE + 0xb000) 61#define U8500_MTU1_BASE_ED (U8500_PER7_BASE + 0xb000)
62#define U8500_TZPC0_BASE (U8500_PER7_BASE + 0xc000) 62#define U8500_TZPC0_BASE_ED (U8500_PER7_BASE + 0xc000)
63#define U8500_CLKRST7_BASE (U8500_PER7_BASE + 0xf000) 63#define U8500_CLKRST7_BASE_ED (U8500_PER7_BASE + 0xf000)
64 64
65/* per6 base addressess */ 65/* per6 base addressess */
66#define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000) 66#define U8500_RNG_BASE (U8500_PER6_BASE + 0x0000)
67#define U8500_PKA_BASE (U8500_PER6_BASE + 0x1000) 67#define U8500_PKA_BASE (U8500_PER6_BASE + 0x1000)
68#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000) 68#define U8500_PKAM_BASE (U8500_PER6_BASE + 0x2000)
69#define U8500_MTU0_BASE_V1 (U8500_PER6_BASE + 0x6000)
70#define U8500_MTU1_BASE_V1 (U8500_PER6_BASE + 0x7000)
71#define U8500_CR_BASE_V1 (U8500_PER6_BASE + 0x8000)
69#define U8500_CRYPTO0_BASE (U8500_PER6_BASE + 0xa000) 72#define U8500_CRYPTO0_BASE (U8500_PER6_BASE + 0xa000)
70#define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000) 73#define U8500_CRYPTO1_BASE (U8500_PER6_BASE + 0xb000)
71#define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000) 74#define U8500_CLKRST6_BASE (U8500_PER6_BASE + 0xf000)
@@ -128,4 +131,20 @@
128/* ST-Ericsson modified pl022 id */ 131/* ST-Ericsson modified pl022 id */
129#define SSP_PER_ID 0x01080022 132#define SSP_PER_ID 0x01080022
130 133
134#ifndef __ASSEMBLY__
135
136#include <asm/cputype.h>
137
138static inline bool cpu_is_u8500ed(void)
139{
140 return (read_cpuid_id() & 15) == 0;
141}
142
143static inline bool cpu_is_u8500v1(void)
144{
145 return (read_cpuid_id() & 15) == 1;
146}
147
148#endif
149
131#endif /* __MACH_HARDWARE_H */ 150#endif /* __MACH_HARDWARE_H */