ARM: ux500: delete U5500 support

This platform has been obsoleted and was only available inside of
ST-Ericsson, no users of this code are left in the world. This
deletes the core U5500 support entirely in the same manner as the
obsoleted U8500 silicon was previously deleted.

The cpu_is_u5500() macros that can read out the CPU ID is left
until the next kernel cycle, this makes it possible to merge
deletion of dependent drivers without breakage.

This also has the upside of removing the mailbox driver which was
our only driver that was outside the drivers/* hiearchy, now the
machine directory only handles machines and nothing else.

Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Rabin Vincent <rabin.vincent@stericsson.com>
Cc: Jonas Aberg <jonas.aberg@stericsson.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Ulf Hansson <ulf.hansson@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

10 files changed, 2 insertions, 387 deletions

diff --git a/arch/arm/mach-ux500/include/mach/db5500-regs.h b/arch/arm/mach-ux500/include/mach/db5500-regs.h
deleted file mode 100644
index 8e714bcb099f..000000000000
--- a/arch/arm/mach-ux500/include/mach/db5500-regs.h
+++ /dev/null
@@ -1,143 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2010
- *
- * License terms: GNU General Public License (GPL) version 2
- */
-
-#ifndef __MACH_DB5500_REGS_H
-#define __MACH_DB5500_REGS_H
-
-#define U5500_PER1_BASE         0xA0020000
-#define U5500_PER2_BASE         0xA0010000
-#define U5500_PER3_BASE         0x80140000
-#define U5500_PER4_BASE         0x80150000
-#define U5500_PER5_BASE         0x80100000
-#define U5500_PER6_BASE         0x80120000
-
-#define U5500_GIC_DIST_BASE     0xA0411000
-#define U5500_GIC_CPU_BASE      0xA0410100
-#define U5500_DMA_BASE          0x90030000
-#define U5500_STM_BASE          0x90020000
-#define U5500_STM_REG_BASE      (U5500_STM_BASE + 0xF000)
-#define U5500_MCDE_BASE         0xA0400000
-#define U5500_MODEM_BASE        0xB0000000
-#define U5500_L2CC_BASE         0xA0412000
-#define U5500_SCU_BASE          0xA0410000
-#define U5500_DSI1_BASE         0xA0401000
-#define U5500_DSI2_BASE         0xA0402000
-#define U5500_SIA_BASE          0xA0100000
-#define U5500_SVA_BASE          0x80200000
-#define U5500_HSEM_BASE         0xA0000000
-#define U5500_NAND0_BASE        0x60000000
-#define U5500_NAND1_BASE        0x70000000
-#define U5500_TWD_BASE          0xa0410600
-#define U5500_ICN_BASE          0xA0040000
-#define U5500_B2R2_BASE         0xa0200000
-#define U5500_BOOT_ROM_BASE     0x90000000
-
-#define U5500_FSMC_BASE         (U5500_PER1_BASE + 0x0000)
-#define U5500_SDI0_BASE         (U5500_PER1_BASE + 0x1000)
-#define U5500_SDI2_BASE         (U5500_PER1_BASE + 0x2000)
-#define U5500_UART0_BASE        (U5500_PER1_BASE + 0x3000)
-#define U5500_I2C1_BASE         (U5500_PER1_BASE + 0x4000)
-#define U5500_MSP0_BASE         (U5500_PER1_BASE + 0x5000)
-#define U5500_GPIO0_BASE        (U5500_PER1_BASE + 0xE000)
-#define U5500_CLKRST1_BASE      (U5500_PER1_BASE + 0xF000)
-
-#define U5500_USBOTG_BASE       (U5500_PER2_BASE + 0x0000)
-#define U5500_GPIO1_BASE        (U5500_PER2_BASE + 0xE000)
-#define U5500_CLKRST2_BASE      (U5500_PER2_BASE + 0xF000)
-
-#define U5500_KEYPAD_BASE       (U5500_PER3_BASE + 0x0000)
-#define U5500_PWM_BASE          (U5500_PER3_BASE + 0x1000)
-#define U5500_GPIO3_BASE        (U5500_PER3_BASE + 0xE000)
-#define U5500_CLKRST3_BASE      (U5500_PER3_BASE + 0xF000)
-
-#define U5500_BACKUPRAM0_BASE   (U5500_PER4_BASE + 0x0000)
-#define U5500_BACKUPRAM1_BASE   (U5500_PER4_BASE + 0x1000)
-#define U5500_RTT0_BASE         (U5500_PER4_BASE + 0x2000)
-#define U5500_RTT1_BASE         (U5500_PER4_BASE + 0x3000)
-#define U5500_RTC_BASE          (U5500_PER4_BASE + 0x4000)
-#define U5500_SCR_BASE          (U5500_PER4_BASE + 0x5000)
-#define U5500_DMC_BASE          (U5500_PER4_BASE + 0x6000)
-#define U5500_PRCMU_BASE        (U5500_PER4_BASE + 0x7000)
-#define U5500_PRCMU_TIMER_3_BASE (U5500_PER4_BASE + 0x07338)
-#define U5500_PRCMU_TIMER_4_BASE (U5500_PER4_BASE + 0x07450)
-#define U5500_MSP1_BASE         (U5500_PER4_BASE + 0x9000)
-#define U5500_GPIO2_BASE        (U5500_PER4_BASE + 0xA000)
-#define U5500_MTIMER_BASE       (U5500_PER4_BASE + 0xC000)
-#define U5500_CDETECT_BASE      (U5500_PER4_BASE + 0xF000)
-#define U5500_PRCMU_TCDM_BASE   (U5500_PER4_BASE + 0x18000)
-#define U5500_PRCMU_TCPM_BASE   (U5500_PER4_BASE + 0x10000)
-#define U5500_TPIU_BASE         (U5500_PER4_BASE + 0x50000)
-
-#define U5500_SPI0_BASE         (U5500_PER5_BASE + 0x0000)
-#define U5500_SPI1_BASE         (U5500_PER5_BASE + 0x1000)
-#define U5500_SPI2_BASE         (U5500_PER5_BASE + 0x2000)
-#define U5500_SPI3_BASE         (U5500_PER5_BASE + 0x3000)
-#define U5500_UART1_BASE        (U5500_PER5_BASE + 0x4000)
-#define U5500_UART2_BASE        (U5500_PER5_BASE + 0x5000)
-#define U5500_UART3_BASE        (U5500_PER5_BASE + 0x6000)
-#define U5500_SDI1_BASE         (U5500_PER5_BASE + 0x7000)
-#define U5500_SDI3_BASE         (U5500_PER5_BASE + 0x8000)
-#define U5500_SDI4_BASE         (U5500_PER5_BASE + 0x9000)
-#define U5500_I2C2_BASE         (U5500_PER5_BASE + 0xA000)
-#define U5500_I2C3_BASE         (U5500_PER5_BASE + 0xB000)
-#define U5500_MSP2_BASE         (U5500_PER5_BASE + 0xC000)
-#define U5500_IRDA_BASE         (U5500_PER5_BASE + 0xD000)
-#define U5500_IRRC_BASE         (U5500_PER5_BASE + 0x10000)
-#define U5500_GPIO4_BASE        (U5500_PER5_BASE + 0x1E000)
-#define U5500_CLKRST5_BASE      (U5500_PER5_BASE + 0x1F000)
-
-#define U5500_RNG_BASE          (U5500_PER6_BASE + 0x0000)
-#define U5500_HASH0_BASE        (U5500_PER6_BASE + 0x1000)
-#define U5500_HASH1_BASE        (U5500_PER6_BASE + 0x2000)
-#define U5500_PKA_BASE          (U5500_PER6_BASE + 0x4000)
-#define U5500_PKAM_BASE         (U5500_PER6_BASE + 0x5100)
-#define U5500_MTU0_BASE         (U5500_PER6_BASE + 0x6000)
-#define U5500_MTU1_BASE         (U5500_PER6_BASE + 0x7000)
-#define U5500_CR_BASE           (U5500_PER6_BASE + 0x8000)
-#define U5500_CRYP0_BASE        (U5500_PER6_BASE + 0xA000)
-#define U5500_CRYP1_BASE        (U5500_PER6_BASE + 0xB000)
-#define U5500_CLKRST6_BASE      (U5500_PER6_BASE + 0xF000)
-
-#define U5500_GPIOBANK0_BASE    U5500_GPIO0_BASE
-#define U5500_GPIOBANK1_BASE    (U5500_GPIO0_BASE + 0x80)
-#define U5500_GPIOBANK2_BASE    U5500_GPIO1_BASE
-#define U5500_GPIOBANK3_BASE    U5500_GPIO2_BASE
-#define U5500_GPIOBANK4_BASE    U5500_GPIO3_BASE
-#define U5500_GPIOBANK5_BASE    U5500_GPIO4_BASE
-#define U5500_GPIOBANK6_BASE    (U5500_GPIO4_BASE + 0x80)
-#define U5500_GPIOBANK7_BASE    (U5500_GPIO4_BASE + 0x100)
-
-#define U5500_MBOX_BASE         (U5500_MODEM_BASE + 0xFFD1000)
-#define U5500_MBOX0_PEER_START  (U5500_MBOX_BASE + 0x40)
-#define U5500_MBOX0_PEER_END    (U5500_MBOX_BASE + 0x5F)
-#define U5500_MBOX0_LOCAL_START (U5500_MBOX_BASE + 0x60)
-#define U5500_MBOX0_LOCAL_END   (U5500_MBOX_BASE + 0x7F)
-#define U5500_MBOX1_PEER_START  (U5500_MBOX_BASE + 0x80)
-#define U5500_MBOX1_PEER_END    (U5500_MBOX_BASE + 0x9F)
-#define U5500_MBOX1_LOCAL_START (U5500_MBOX_BASE + 0xA0)
-#define U5500_MBOX1_LOCAL_END   (U5500_MBOX_BASE + 0xBF)
-#define U5500_MBOX2_PEER_START  (U5500_MBOX_BASE + 0x00)
-#define U5500_MBOX2_PEER_END    (U5500_MBOX_BASE + 0x1F)
-#define U5500_MBOX2_LOCAL_START (U5500_MBOX_BASE + 0x20)
-#define U5500_MBOX2_LOCAL_END   (U5500_MBOX_BASE + 0x3F)
-
-#define U5500_ACCCON_BASE_SEC   (0xBFFF0000)
-#define U5500_ACCCON_BASE               (0xBFFF1000)
-#define U5500_ACCCON_CPUVEC_RESET_ADDR_OFFSET (0x00000020)
-#define U5500_ACCCON_ACC_CPU_CTRL_OFFSET (0x000000BC)
-#define U5500_INTCON_MBOX1_INT_RESET_ADDR       (0xBFFD31A4)
-
-#define U5500_ESRAM_BASE                0x40000000
-#define U5500_ESRAM_DMA_LCPA_OFFSET     0x10000
-#define U5500_DMA_LCPA_BASE    (U5500_ESRAM_BASE + U5500_ESRAM_DMA_LCPA_OFFSET)
-
-#define U5500_MCDE_SIZE         0x1000
-#define U5500_DSI_LINK_SIZE     0x1000
-#define U5500_DSI_LINK_COUNT    0x2
-#define U5500_DSI_LINK1_BASE    (U5500_MCDE_BASE + U5500_MCDE_SIZE)
-#define U5500_DSI_LINK2_BASE    (U5500_DSI_LINK1_BASE + U5500_DSI_LINK_SIZE)
-
-#endif
diff --git a/arch/arm/mach-ux500/include/mach/debug-macro.S b/arch/arm/mach-ux500/include/mach/debug-macro.S
index 8d74d927d4e2..67035223334a 100644
--- a/arch/arm/mach-ux500/include/mach/debug-macro.S
+++ b/arch/arm/mach-ux500/include/mach/debug-macro.S
@@ -20,10 +20,6 @@
  * built, so that there's some hint during the build that something is wrong.
  */
 
-#ifdef CONFIG_UX500_SOC_DB5500
-#define __UX500_UART(n) U5500_UART##n##_BASE
-#endif
-
 #ifdef CONFIG_UX500_SOC_DB8500
 #define __UX500_UART(n) U8500_UART##n##_BASE
 #endif
diff --git a/arch/arm/mach-ux500/include/mach/devices.h b/arch/arm/mach-ux500/include/mach/devices.h
index 5f6cb71fc62d..9b5eb69a0154 100644
--- a/arch/arm/mach-ux500/include/mach/devices.h
+++ b/arch/arm/mach-ux500/include/mach/devices.h
@@ -10,7 +10,6 @@
 struct platform_device;
 struct amba_device;
 
-extern struct platform_device u5500_gpio_devs[];
 extern struct platform_device u8500_gpio_devs[];
 
 extern struct amba_device ux500_pl031_device;
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h
index f84698936d36..cf6fac3d1eeb 100644
--- a/arch/arm/mach-ux500/include/mach/hardware.h
+++ b/arch/arm/mach-ux500/include/mach/hardware.h
@@ -28,7 +28,6 @@
 #define io_p2v(n)               __io_address(n)
 
 #include <mach/db8500-regs.h>
-#include <mach/db5500-regs.h>
 
 #define MSP_TX_RX_REG_OFFSET    0
 
diff --git a/arch/arm/mach-ux500/include/mach/irqs-board-u5500.h b/arch/arm/mach-ux500/include/mach/irqs-board-u5500.h
deleted file mode 100644
index 29d972c7717b..000000000000
--- a/arch/arm/mach-ux500/include/mach/irqs-board-u5500.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2010
- *
- * License terms: GNU General Public License (GPL) version 2
- */
-
-#ifndef __MACH_IRQS_BOARD_U5500_H
-#define __MACH_IRQS_BOARD_U5500_H
-
-#define AB5500_NR_IRQS          5
-#define IRQ_AB5500_BASE         IRQ_BOARD_START
-#define IRQ_AB5500_END          (IRQ_AB5500_BASE + AB5500_NR_IRQS)
-
-#define U5500_IRQ_END           IRQ_AB5500_END
-
-#if IRQ_BOARD_END < U5500_IRQ_END
-#undef IRQ_BOARD_END
-#define IRQ_BOARD_END           U5500_IRQ_END
-#endif
-
-#endif
diff --git a/arch/arm/mach-ux500/include/mach/irqs-db5500.h b/arch/arm/mach-ux500/include/mach/irqs-db5500.h
deleted file mode 100644
index 77239776a6f2..000000000000
--- a/arch/arm/mach-ux500/include/mach/irqs-db5500.h
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2010
- *
- * Author: Rabin Vincent <rabin.vincent@stericsson.com>
- * License terms: GNU General Public License (GPL) version 2
- */
-
-#ifndef __MACH_IRQS_DB5500_H
-#define __MACH_IRQS_DB5500_H
-
-#define IRQ_DB5500_MTU0                 (IRQ_SHPI_START + 4)
-#define IRQ_DB5500_SPI2                 (IRQ_SHPI_START + 6)
-#define IRQ_DB5500_PMU0                 (IRQ_SHPI_START + 7)
-#define IRQ_DB5500_SPI0                 (IRQ_SHPI_START + 8)
-#define IRQ_DB5500_RTT                  (IRQ_SHPI_START + 9)
-#define IRQ_DB5500_PKA                  (IRQ_SHPI_START + 10)
-#define IRQ_DB5500_UART0                (IRQ_SHPI_START + 11)
-#define IRQ_DB5500_I2C3                 (IRQ_SHPI_START + 12)
-#define IRQ_DB5500_L2CC                 (IRQ_SHPI_START + 13)
-#define IRQ_DB5500_MSP0                 (IRQ_SHPI_START + 14)
-#define IRQ_DB5500_CRYP1                (IRQ_SHPI_START + 15)
-#define IRQ_DB5500_PMU1                 (IRQ_SHPI_START + 16)
-#define IRQ_DB5500_MTU1                 (IRQ_SHPI_START + 17)
-#define IRQ_DB5500_RTC                  (IRQ_SHPI_START + 18)
-#define IRQ_DB5500_UART1                (IRQ_SHPI_START + 19)
-#define IRQ_DB5500_USB_WAKEUP           (IRQ_SHPI_START + 20)
-#define IRQ_DB5500_I2C0                 (IRQ_SHPI_START + 21)
-#define IRQ_DB5500_I2C1                 (IRQ_SHPI_START + 22)
-#define IRQ_DB5500_USBOTG               (IRQ_SHPI_START + 23)
-#define IRQ_DB5500_DMA_SECURE           (IRQ_SHPI_START + 24)
-#define IRQ_DB5500_DMA                  (IRQ_SHPI_START + 25)
-#define IRQ_DB5500_UART2                (IRQ_SHPI_START + 26)
-#define IRQ_DB5500_ICN_PMU1             (IRQ_SHPI_START + 27)
-#define IRQ_DB5500_ICN_PMU2             (IRQ_SHPI_START + 28)
-#define IRQ_DB5500_UART3                (IRQ_SHPI_START + 29)
-#define IRQ_DB5500_SPI3                 (IRQ_SHPI_START + 30)
-#define IRQ_DB5500_SDMMC4               (IRQ_SHPI_START + 31)
-#define IRQ_DB5500_IRRC                 (IRQ_SHPI_START + 33)
-#define IRQ_DB5500_IRDA_FT              (IRQ_SHPI_START + 34)
-#define IRQ_DB5500_IRDA_SD              (IRQ_SHPI_START + 35)
-#define IRQ_DB5500_IRDA_FI              (IRQ_SHPI_START + 36)
-#define IRQ_DB5500_IRDA_FD              (IRQ_SHPI_START + 37)
-#define IRQ_DB5500_FSMC_CODEREADY       (IRQ_SHPI_START + 38)
-#define IRQ_DB5500_FSMC_NANDWAIT        (IRQ_SHPI_START + 39)
-#define IRQ_DB5500_AB5500               (IRQ_SHPI_START + 40)
-#define IRQ_DB5500_SDMMC2               (IRQ_SHPI_START + 41)
-#define IRQ_DB5500_SIA                  (IRQ_SHPI_START + 42)
-#define IRQ_DB5500_SIA2                 (IRQ_SHPI_START + 43)
-#define IRQ_DB5500_HVA                  (IRQ_SHPI_START + 44)
-#define IRQ_DB5500_HVA2                 (IRQ_SHPI_START + 45)
-#define IRQ_DB5500_PRCMU0               (IRQ_SHPI_START + 46)
-#define IRQ_DB5500_PRCMU1               (IRQ_SHPI_START + 47)
-#define IRQ_DB5500_DISP                 (IRQ_SHPI_START + 48)
-#define IRQ_DB5500_SDMMC1               (IRQ_SHPI_START + 50)
-#define IRQ_DB5500_MSP1                 (IRQ_SHPI_START + 52)
-#define IRQ_DB5500_KBD                  (IRQ_SHPI_START + 53)
-#define IRQ_DB5500_I2C2                 (IRQ_SHPI_START + 55)
-#define IRQ_DB5500_B2R2                 (IRQ_SHPI_START + 56)
-#define IRQ_DB5500_CRYP0                (IRQ_SHPI_START + 57)
-#define IRQ_DB5500_SDMMC3               (IRQ_SHPI_START + 59)
-#define IRQ_DB5500_SDMMC0               (IRQ_SHPI_START + 60)
-#define IRQ_DB5500_HSEM                 (IRQ_SHPI_START + 61)
-#define IRQ_DB5500_SBAG                 (IRQ_SHPI_START + 63)
-#define IRQ_DB5500_MODEM                (IRQ_SHPI_START + 65)
-#define IRQ_DB5500_SPI1                 (IRQ_SHPI_START + 96)
-#define IRQ_DB5500_MSP2                 (IRQ_SHPI_START + 98)
-#define IRQ_DB5500_SRPTIMER             (IRQ_SHPI_START + 101)
-#define IRQ_DB5500_CTI0                 (IRQ_SHPI_START + 108)
-#define IRQ_DB5500_CTI1                 (IRQ_SHPI_START + 109)
-#define IRQ_DB5500_ICN_ERR              (IRQ_SHPI_START + 110)
-#define IRQ_DB5500_MALI_PPMMU           (IRQ_SHPI_START + 112)
-#define IRQ_DB5500_MALI_PP              (IRQ_SHPI_START + 113)
-#define IRQ_DB5500_MALI_GPMMU           (IRQ_SHPI_START + 114)
-#define IRQ_DB5500_MALI_GP              (IRQ_SHPI_START + 115)
-#define IRQ_DB5500_MALI                 (IRQ_SHPI_START + 116)
-#define IRQ_DB5500_PRCMU_SEM            (IRQ_SHPI_START + 118)
-#define IRQ_DB5500_GPIO0                (IRQ_SHPI_START + 119)
-#define IRQ_DB5500_GPIO1                (IRQ_SHPI_START + 120)
-#define IRQ_DB5500_GPIO2                (IRQ_SHPI_START + 121)
-#define IRQ_DB5500_GPIO3                (IRQ_SHPI_START + 122)
-#define IRQ_DB5500_GPIO4                (IRQ_SHPI_START + 123)
-#define IRQ_DB5500_GPIO5                (IRQ_SHPI_START + 124)
-#define IRQ_DB5500_GPIO6                (IRQ_SHPI_START + 125)
-#define IRQ_DB5500_GPIO7                (IRQ_SHPI_START + 126)
-
-#ifdef CONFIG_UX500_SOC_DB5500
-
-/*
- * After the GPIO ones we reserve a range of IRQ:s in which virtual
- * IRQ:s representing modem IRQ:s can be allocated
- */
-#define IRQ_MODEM_EVENTS_BASE   IRQ_SOC_START
-#define IRQ_MODEM_EVENTS_NBR    72
-#define IRQ_MODEM_EVENTS_END    (IRQ_MODEM_EVENTS_BASE + IRQ_MODEM_EVENTS_NBR)
-
-/* List of virtual IRQ:s that are allocated from the range above */
-#define MBOX_PAIR0_VIRT_IRQ     (IRQ_MODEM_EVENTS_BASE + 43)
-#define MBOX_PAIR1_VIRT_IRQ     (IRQ_MODEM_EVENTS_BASE + 45)
-#define MBOX_PAIR2_VIRT_IRQ     (IRQ_MODEM_EVENTS_BASE + 41)
-
-/*
- * We may have several SoCs, but only one will run at a
- * time, so the one with most IRQs will bump this ahead,
- * but the IRQ_SOC_START remains the same for either SoC.
- */
-#if IRQ_SOC_END < IRQ_MODEM_EVENTS_END
-#undef IRQ_SOC_END
-#define IRQ_SOC_END             IRQ_MODEM_EVENTS_END
-#endif
-
-#endif /* CONFIG_UX500_SOC_DB5500 */
-
-#endif
diff --git a/arch/arm/mach-ux500/include/mach/irqs.h b/arch/arm/mach-ux500/include/mach/irqs.h
index c23a6b5f0c4e..d06dcf6208fa 100644
--- a/arch/arm/mach-ux500/include/mach/irqs.h
+++ b/arch/arm/mach-ux500/include/mach/irqs.h
@@ -36,7 +36,6 @@
 /* This will be overridden by SoC-specific irq headers */
 #define IRQ_SOC_END             IRQ_SOC_START
 
-#include <mach/irqs-db5500.h>
 #include <mach/irqs-db8500.h>
 
 #define IRQ_BOARD_START         IRQ_SOC_END
@@ -47,10 +46,6 @@
 #include <mach/irqs-board-mop500.h>
 #endif
 
-#ifdef CONFIG_MACH_U5500
-#include <mach/irqs-board-u5500.h>
-#endif
-
 #define NR_IRQS                 IRQ_BOARD_END
 
 #endif /* ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-ux500/include/mach/mbox-db5500.h b/arch/arm/mach-ux500/include/mach/mbox-db5500.h
deleted file mode 100644
index 7f9da4d2fbda..000000000000
--- a/arch/arm/mach-ux500/include/mach/mbox-db5500.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * Copyright (C) ST-Ericsson SA 2010
- * Author: Stefan Nilsson <stefan.xk.nilsson@stericsson.com> for ST-Ericsson.
- * Author: Martin Persson <martin.persson@stericsson.com> for ST-Ericsson.
- * License terms: GNU General Public License (GPL), version 2.
- */
-
-#ifndef __INC_STE_MBOX_H
-#define __INC_STE_MBOX_H
-
-#define MBOX_BUF_SIZE 16
-#define MBOX_NAME_SIZE 8
-
-/**
-  * mbox_recv_cb_t - Definition of the mailbox callback.
-  * @mbox_msg:  The mailbox message.
-  * @priv:      The clients private data as specified in the call to mbox_setup.
-  *
-  * This function will be called upon reception of new mailbox messages.
-  */
-typedef void mbox_recv_cb_t (u32 mbox_msg, void *priv);
-
-/**
-  * struct mbox - Mailbox instance struct
-  * @list:              Linked list head.
-  * @pdev:              Pointer to device struct.
-  * @cb:                Callback function. Will be called
-  *                     when new data is received.
-  * @client_data:       Clients private data. Will be sent back
-  *                     in the callback function.
-  * @virtbase_peer:     Virtual address for outgoing mailbox.
-  * @virtbase_local:    Virtual address for incoming mailbox.
-  * @buffer:            Then internal queue for outgoing messages.
-  * @name:              Name of this mailbox.
-  * @buffer_available:  Completion variable to achieve "blocking send".
-  *                     This variable will be signaled when there is
-  *                     internal buffer space available.
-  * @client_blocked:    To keep track if any client is currently
-  *                     blocked.
-  * @lock:              Spinlock to protect this mailbox instance.
-  * @write_index:       Index in internal buffer to write to.
-  * @read_index:        Index in internal buffer to read from.
-  * @allocated:         Indicates whether this particular mailbox
-  *                     id has been allocated by someone.
-  */
-struct mbox {
-        struct list_head list;
-        struct platform_device *pdev;
-        mbox_recv_cb_t *cb;
-        void *client_data;
-        void __iomem *virtbase_peer;
-        void __iomem *virtbase_local;
-        u32 buffer[MBOX_BUF_SIZE];
-        char name[MBOX_NAME_SIZE];
-        struct completion buffer_available;
-        u8 client_blocked;
-        spinlock_t lock;
-        u8 write_index;
-        u8 read_index;
-        bool allocated;
-};
-
-/**
-  * mbox_setup - Set up a mailbox and return its instance.
-  * @mbox_id:   The ID number of the mailbox. 0 or 1 for modem CPU,
-  *             2 for modem DSP.
-  * @mbox_cb:   Pointer to the callback function to be called when a new message
-  *             is received.
-  * @priv:      Client user data which will be returned in the callback.
-  *
-  * Returns a mailbox instance to be specified in subsequent calls to mbox_send.
-  */
-struct mbox *mbox_setup(u8 mbox_id, mbox_recv_cb_t *mbox_cb, void *priv);
-
-/**
-  * mbox_send - Send a mailbox message.
-  * @mbox:      Mailbox instance (returned by mbox_setup)
-  * @mbox_msg:  The mailbox message to send.
-  * @block:     Specifies whether this call will block until send is possible,
-  *             or return an error if the mailbox buffer is full.
-  *
-  * Returns 0 on success or a negative error code on error. -ENOMEM indicates
-  * that the internal buffer is full and you have to try again later (or
-  * specify "block" in order to block until send is possible).
-  */
-int mbox_send(struct mbox *mbox, u32 mbox_msg, bool block);
-
-#endif /*INC_STE_MBOX_H*/
diff --git a/arch/arm/mach-ux500/include/mach/setup.h b/arch/arm/mach-ux500/include/mach/setup.h
index 3dc00ffa7bfa..4e369f1645ec 100644
--- a/arch/arm/mach-ux500/include/mach/setup.h
+++ b/arch/arm/mach-ux500/include/mach/setup.h
@@ -15,18 +15,12 @@
 #include <linux/init.h>
 
 void __init ux500_map_io(void);
-extern void __init u5500_map_io(void);
 extern void __init u8500_map_io(void);
 
-extern struct device * __init u5500_init_devices(void);
 extern struct device * __init u8500_init_devices(void);
 
 extern void __init ux500_init_irq(void);
 
-extern void __init u5500_sdi_init(struct device *parent);
-
-extern void __init db5500_dma_init(struct device *parent);
-
 extern struct device *ux500_soc_device_init(const char *soc_id);
 
 struct amba_device;
diff --git a/arch/arm/mach-ux500/include/mach/uncompress.h b/arch/arm/mach-ux500/include/mach/uncompress.h
index 6fb3c4b0105d..34775baadaea 100644
--- a/arch/arm/mach-ux500/include/mach/uncompress.h
+++ b/arch/arm/mach-ux500/include/mach/uncompress.h
@@ -50,11 +50,8 @@ static void flush(void)
 
 static inline void arch_decomp_setup(void)
 {
-        /* Check in run time if we run on an U8500 or U5500 */
-        if (machine_is_u5500())
-                ux500_uart_base = U5500_UART0_BASE;
-        else
-                ux500_uart_base = U8500_UART2_BASE;
+        /* Use machine_is_foo() macro if you need to switch base someday */
+        ux500_uart_base = U8500_UART2_BASE;
 }
 
 #define arch_decomp_wdog() /* nothing to do here */