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authorMattias Wallin <mattias.wallin@stericsson.com>2010-12-02 10:20:42 -0500
committerLinus Walleij <linus.walleij@stericsson.com>2010-12-08 07:14:13 -0500
commitfcbd458e95316fe5031f1b8eaf5e66ce8f3c3146 (patch)
tree504699aded7b00e11de6019af68381fcdf0beecf /arch/arm/mach-ux500/include
parentfbf1eadf950da1f5f5ed2e454d2f191f90fe1ebe (diff)
ARM: ux500: prcmu db8500 v2 support
This patch adds support for db8500 chip version 2. The TCDM memory address of the PRCMU is changed and dynamic detection of that is added. Signed-off-by: Mattias Wallin <mattias.wallin@stericsson.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Diffstat (limited to 'arch/arm/mach-ux500/include')
-rw-r--r--arch/arm/mach-ux500/include/mach/db8500-regs.h3
-rw-r--r--arch/arm/mach-ux500/include/mach/prcmu.h1
2 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mach-ux500/include/mach/db8500-regs.h b/arch/arm/mach-ux500/include/mach/db8500-regs.h
index f07d0986409d..0fefb34c11e4 100644
--- a/arch/arm/mach-ux500/include/mach/db8500-regs.h
+++ b/arch/arm/mach-ux500/include/mach/db8500-regs.h
@@ -92,7 +92,8 @@
92#define U8500_SCR_BASE (U8500_PER4_BASE + 0x05000) 92#define U8500_SCR_BASE (U8500_PER4_BASE + 0x05000)
93#define U8500_DMC_BASE (U8500_PER4_BASE + 0x06000) 93#define U8500_DMC_BASE (U8500_PER4_BASE + 0x06000)
94#define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000) 94#define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000)
95#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x0f000) 95#define U8500_PRCMU_TCDM_BASE_V1 (U8500_PER4_BASE + 0x0f000)
96#define U8500_PRCMU_TCDM_BASE (U8500_PER4_BASE + 0x68000)
96 97
97/* per3 base addresses */ 98/* per3 base addresses */
98#define U8500_FSMC_BASE (U8500_PER3_BASE + 0x0000) 99#define U8500_FSMC_BASE (U8500_PER3_BASE + 0x0000)
diff --git a/arch/arm/mach-ux500/include/mach/prcmu.h b/arch/arm/mach-ux500/include/mach/prcmu.h
index 549843ff6dbe..daa9d3ab7e0c 100644
--- a/arch/arm/mach-ux500/include/mach/prcmu.h
+++ b/arch/arm/mach-ux500/include/mach/prcmu.h
@@ -9,6 +9,7 @@
9#ifndef __MACH_PRCMU_H 9#ifndef __MACH_PRCMU_H
10#define __MACH_PRCMU_H 10#define __MACH_PRCMU_H
11 11
12void __init prcmu_early_init(void);
12int prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size); 13int prcmu_abb_read(u8 slave, u8 reg, u8 *value, u8 size);
13int prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size); 14int prcmu_abb_write(u8 slave, u8 reg, u8 *value, u8 size);
14 15