aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-ux500/devices-db8500.h
diff options
context:
space:
mode:
authorLee Jones <lee.jones@linaro.org>2012-02-06 14:22:21 -0500
committerArnd Bergmann <arnd@arndb.de>2012-02-13 01:31:29 -0500
commit18403424c4fe5bac509bf52343f5d5407d45ee3a (patch)
treeae9a0f3056c712ee7f8042d667b267bedda92abf /arch/arm/mach-ux500/devices-db8500.h
parentd65b4e98d7ea3038b767b70fe8be959b2913f16d (diff)
ARM: ux500: pass parent pointer to each platform device
This patch provides a means for any device within ux500 platform code to allocate its own parent. This is particularly prudent with the introduction of /sys/devices/socX, as a device can now proclaim to be integral part of an SoC, rather than a more generic platform device. Latter patches make good use of this functionality. Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-ux500/devices-db8500.h')
-rw-r--r--arch/arm/mach-ux500/devices-db8500.h166
1 files changed, 94 insertions, 72 deletions
diff --git a/arch/arm/mach-ux500/devices-db8500.h b/arch/arm/mach-ux500/devices-db8500.h
index cbd4a9ae8109..9bd08ad70042 100644
--- a/arch/arm/mach-ux500/devices-db8500.h
+++ b/arch/arm/mach-ux500/devices-db8500.h
@@ -14,7 +14,9 @@ struct ske_keypad_platform_data;
14struct pl022_ssp_controller; 14struct pl022_ssp_controller;
15 15
16static inline struct platform_device * 16static inline struct platform_device *
17db8500_add_ske_keypad(struct ske_keypad_platform_data *pdata) 17db8500_add_ske_keypad(struct device *parent,
18 struct ske_keypad_platform_data *pdata,
19 size_t size)
18{ 20{
19 return dbx500_add_platform_device_4k1irq("nmk-ske-keypad", -1, 21 return dbx500_add_platform_device_4k1irq("nmk-ske-keypad", -1,
20 U8500_SKE_BASE, 22 U8500_SKE_BASE,
@@ -22,80 +24,100 @@ db8500_add_ske_keypad(struct ske_keypad_platform_data *pdata)
22} 24}
23 25
24static inline struct amba_device * 26static inline struct amba_device *
25db8500_add_ssp(const char *name, resource_size_t base, int irq, 27db8500_add_ssp(struct device *parent, const char *name, resource_size_t base,
26 struct pl022_ssp_controller *pdata) 28 int irq, struct pl022_ssp_controller *pdata)
27{ 29{
28 return dbx500_add_amba_device(name, base, irq, pdata, 0); 30 return dbx500_add_amba_device(parent, name, base, irq, pdata, 0);
29} 31}
30 32
31 33
32#define db8500_add_i2c0(pdata) \ 34#define db8500_add_i2c0(parent, pdata) \
33 dbx500_add_i2c(0, U8500_I2C0_BASE, IRQ_DB8500_I2C0, pdata) 35 dbx500_add_i2c(parent, 0, U8500_I2C0_BASE, IRQ_DB8500_I2C0, pdata)
34#define db8500_add_i2c1(pdata) \ 36#define db8500_add_i2c1(parent, pdata) \
35 dbx500_add_i2c(1, U8500_I2C1_BASE, IRQ_DB8500_I2C1, pdata) 37 dbx500_add_i2c(parent, 1, U8500_I2C1_BASE, IRQ_DB8500_I2C1, pdata)
36#define db8500_add_i2c2(pdata) \ 38#define db8500_add_i2c2(parent, pdata) \
37 dbx500_add_i2c(2, U8500_I2C2_BASE, IRQ_DB8500_I2C2, pdata) 39 dbx500_add_i2c(parent, 2, U8500_I2C2_BASE, IRQ_DB8500_I2C2, pdata)
38#define db8500_add_i2c3(pdata) \ 40#define db8500_add_i2c3(parent, pdata) \
39 dbx500_add_i2c(3, U8500_I2C3_BASE, IRQ_DB8500_I2C3, pdata) 41 dbx500_add_i2c(parent, 3, U8500_I2C3_BASE, IRQ_DB8500_I2C3, pdata)
40#define db8500_add_i2c4(pdata) \ 42#define db8500_add_i2c4(parent, pdata) \
41 dbx500_add_i2c(4, U8500_I2C4_BASE, IRQ_DB8500_I2C4, pdata) 43 dbx500_add_i2c(parent, 4, U8500_I2C4_BASE, IRQ_DB8500_I2C4, pdata)
42 44
43#define db8500_add_msp0_i2s(pdata) \ 45#define db8500_add_msp0_i2s(parent, pdata) \
44 dbx500_add_msp_i2s(0, U8500_MSP0_BASE, IRQ_DB8500_MSP0, pdata) 46 dbx500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0, pdata)
45#define db8500_add_msp1_i2s(pdata) \ 47#define db8500_add_msp1_i2s(parent, pdata) \
46 dbx500_add_msp_i2s(1, U8500_MSP1_BASE, IRQ_DB8500_MSP1, pdata) 48 dbx500_add_msp_i2s(parent, 1, U8500_MSP1_BASE, IRQ_DB8500_MSP1, pdata)
47#define db8500_add_msp2_i2s(pdata) \ 49#define db8500_add_msp2_i2s(parent, pdata) \
48 dbx500_add_msp_i2s(2, U8500_MSP2_BASE, IRQ_DB8500_MSP2, pdata) 50 dbx500_add_msp_i2s(parent, 2, U8500_MSP2_BASE, IRQ_DB8500_MSP2, pdata)
49#define db8500_add_msp3_i2s(pdata) \ 51#define db8500_add_msp3_i2s(parent, pdata) \
50 dbx500_add_msp_i2s(3, U8500_MSP3_BASE, IRQ_DB8500_MSP1, pdata) 52 dbx500_add_msp_i2s(parent, 3, U8500_MSP3_BASE, IRQ_DB8500_MSP1, pdata)
51 53
52#define db8500_add_msp0_spi(pdata) \ 54#define db8500_add_msp0_spi(parent, pdata) \
53 dbx500_add_msp_spi("msp0", U8500_MSP0_BASE, IRQ_DB8500_MSP0, pdata) 55 dbx500_add_msp_spi(parent, "msp0", U8500_MSP0_BASE, \
54#define db8500_add_msp1_spi(pdata) \ 56 IRQ_DB8500_MSP0, pdata)
55 dbx500_add_msp_spi("msp1", U8500_MSP1_BASE, IRQ_DB8500_MSP1, pdata) 57#define db8500_add_msp1_spi(parent, pdata) \
56#define db8500_add_msp2_spi(pdata) \ 58 dbx500_add_msp_spi(parent, "msp1", U8500_MSP1_BASE, \
57 dbx500_add_msp_spi("msp2", U8500_MSP2_BASE, IRQ_DB8500_MSP2, pdata) 59 IRQ_DB8500_MSP1, pdata)
58#define db8500_add_msp3_spi(pdata) \ 60#define db8500_add_msp2_spi(parent, pdata) \
59 dbx500_add_msp_spi("msp3", U8500_MSP3_BASE, IRQ_DB8500_MSP1, pdata) 61 dbx500_add_msp_spi(parent, "msp2", U8500_MSP2_BASE, \
60 62 IRQ_DB8500_MSP2, pdata)
61#define db8500_add_rtc() \ 63#define db8500_add_msp3_spi(parent, pdata) \
62 dbx500_add_rtc(U8500_RTC_BASE, IRQ_DB8500_RTC); 64 dbx500_add_msp_spi(parent, "msp3", U8500_MSP3_BASE, \
63 65 IRQ_DB8500_MSP1, pdata)
64#define db8500_add_usb(rx_cfg, tx_cfg) \ 66
65 ux500_add_usb(U8500_USBOTG_BASE, IRQ_DB8500_USBOTG, rx_cfg, tx_cfg) 67#define db8500_add_rtc(parent) \
66 68 dbx500_add_rtc(parent, U8500_RTC_BASE, IRQ_DB8500_RTC);
67#define db8500_add_sdi0(pdata, pid) \ 69
68 dbx500_add_sdi("sdi0", U8500_SDI0_BASE, IRQ_DB8500_SDMMC0, pdata, pid) 70#define db8500_add_usb(parent, rx_cfg, tx_cfg) \
69#define db8500_add_sdi1(pdata, pid) \ 71 ux500_add_usb(parent, U8500_USBOTG_BASE, \
70 dbx500_add_sdi("sdi1", U8500_SDI1_BASE, IRQ_DB8500_SDMMC1, pdata, pid) 72 IRQ_DB8500_USBOTG, rx_cfg, tx_cfg)
71#define db8500_add_sdi2(pdata, pid) \ 73
72 dbx500_add_sdi("sdi2", U8500_SDI2_BASE, IRQ_DB8500_SDMMC2, pdata, pid) 74#define db8500_add_sdi0(parent, pdata, pid) \
73#define db8500_add_sdi3(pdata, pid) \ 75 dbx500_add_sdi(parent, "sdi0", U8500_SDI0_BASE, \
74 dbx500_add_sdi("sdi3", U8500_SDI3_BASE, IRQ_DB8500_SDMMC3, pdata, pid) 76 IRQ_DB8500_SDMMC0, pdata, pid)
75#define db8500_add_sdi4(pdata, pid) \ 77#define db8500_add_sdi1(parent, pdata, pid) \
76 dbx500_add_sdi("sdi4", U8500_SDI4_BASE, IRQ_DB8500_SDMMC4, pdata, pid) 78 dbx500_add_sdi(parent, "sdi1", U8500_SDI1_BASE, \
77#define db8500_add_sdi5(pdata, pid) \ 79 IRQ_DB8500_SDMMC1, pdata, pid)
78 dbx500_add_sdi("sdi5", U8500_SDI5_BASE, IRQ_DB8500_SDMMC5, pdata, pid) 80#define db8500_add_sdi2(parent, pdata, pid) \
79 81 dbx500_add_sdi(parent, "sdi2", U8500_SDI2_BASE, \
80#define db8500_add_ssp0(pdata) \ 82 IRQ_DB8500_SDMMC2, pdata, pid)
81 db8500_add_ssp("ssp0", U8500_SSP0_BASE, IRQ_DB8500_SSP0, pdata) 83#define db8500_add_sdi3(parent, pdata, pid) \
82#define db8500_add_ssp1(pdata) \ 84 dbx500_add_sdi(parent, "sdi3", U8500_SDI3_BASE, \
83 db8500_add_ssp("ssp1", U8500_SSP1_BASE, IRQ_DB8500_SSP1, pdata) 85 IRQ_DB8500_SDMMC3, pdata, pid)
84 86#define db8500_add_sdi4(parent, pdata, pid) \
85#define db8500_add_spi0(pdata) \ 87 dbx500_add_sdi(parent, "sdi4", U8500_SDI4_BASE, \
86 dbx500_add_spi("spi0", U8500_SPI0_BASE, IRQ_DB8500_SPI0, pdata, 0) 88 IRQ_DB8500_SDMMC4, pdata, pid)
87#define db8500_add_spi1(pdata) \ 89#define db8500_add_sdi5(parent, pdata, pid) \
88 dbx500_add_spi("spi1", U8500_SPI1_BASE, IRQ_DB8500_SPI1, pdata, 0) 90 dbx500_add_sdi(parent, "sdi5", U8500_SDI5_BASE, \
89#define db8500_add_spi2(pdata) \ 91 IRQ_DB8500_SDMMC5, pdata, pid)
90 dbx500_add_spi("spi2", U8500_SPI2_BASE, IRQ_DB8500_SPI2, pdata, 0) 92
91#define db8500_add_spi3(pdata) \ 93#define db8500_add_ssp0(parent, pdata) \
92 dbx500_add_spi("spi3", U8500_SPI3_BASE, IRQ_DB8500_SPI3, pdata, 0) 94 db8500_add_ssp(parent, "ssp0", U8500_SSP0_BASE, \
93 95 IRQ_DB8500_SSP0, pdata)
94#define db8500_add_uart0(pdata) \ 96#define db8500_add_ssp1(parent, pdata) \
95 dbx500_add_uart("uart0", U8500_UART0_BASE, IRQ_DB8500_UART0, pdata) 97 db8500_add_ssp(parent, "ssp1", U8500_SSP1_BASE, \
96#define db8500_add_uart1(pdata) \ 98 IRQ_DB8500_SSP1, pdata)
97 dbx500_add_uart("uart1", U8500_UART1_BASE, IRQ_DB8500_UART1, pdata) 99
98#define db8500_add_uart2(pdata) \ 100#define db8500_add_spi0(parent, pdata) \
99 dbx500_add_uart("uart2", U8500_UART2_BASE, IRQ_DB8500_UART2, pdata) 101 dbx500_add_spi(parent, "spi0", U8500_SPI0_BASE, \
102 IRQ_DB8500_SPI0, pdata, 0)
103#define db8500_add_spi1(parent, pdata) \
104 dbx500_add_spi(parent, "spi1", U8500_SPI1_BASE, \
105 IRQ_DB8500_SPI1, pdata, 0)
106#define db8500_add_spi2(parent, pdata) \
107 dbx500_add_spi(parent, "spi2", U8500_SPI2_BASE, \
108 IRQ_DB8500_SPI2, pdata, 0)
109#define db8500_add_spi3(parent, pdata) \
110 dbx500_add_spi(parent, "spi3", U8500_SPI3_BASE, \
111 IRQ_DB8500_SPI3, pdata, 0)
112
113#define db8500_add_uart0(parent, pdata) \
114 dbx500_add_uart(parent, "uart0", U8500_UART0_BASE, \
115 IRQ_DB8500_UART0, pdata)
116#define db8500_add_uart1(parent, pdata) \
117 dbx500_add_uart(parent, "uart1", U8500_UART1_BASE, \
118 IRQ_DB8500_UART1, pdata)
119#define db8500_add_uart2(parent, pdata) \
120 dbx500_add_uart(parent, "uart2", U8500_UART2_BASE, \
121 IRQ_DB8500_UART2, pdata)
100 122
101#endif 123#endif