diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2011-03-24 11:13:13 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-05-26 05:33:35 -0400 |
commit | 729303191ef4bd5df4c5e9ffca62268758928b2c (patch) | |
tree | e2410d5b07b33efc5f03c3759d09f89660c4bb05 /arch/arm/mach-ux500/devices-db5500.h | |
parent | 97ceed1fc29b601e64af98fd785e25fec4383b12 (diff) |
ARM: 6830/1: mach-ux500: force PrimeCell revisions
The DB8500v2 and DB5500 has a fifth version of the "PL023" and
PL180 blocks. However the ASIC engineers have forgot to bump the
revision in the PrimeCell peripheral ID registers. Since the
platform is aware of the actual silicon revision we need to
hard-code the periphid from the platform, bumping the subrevision
field to 1.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-ux500/devices-db5500.h')
-rw-r--r-- | arch/arm/mach-ux500/devices-db5500.h | 28 |
1 files changed, 19 insertions, 9 deletions
diff --git a/arch/arm/mach-ux500/devices-db5500.h b/arch/arm/mach-ux500/devices-db5500.h index 94627f7783b0..0c4bccd02b90 100644 --- a/arch/arm/mach-ux500/devices-db5500.h +++ b/arch/arm/mach-ux500/devices-db5500.h | |||
@@ -38,24 +38,34 @@ | |||
38 | ux500_add_usb(U5500_USBOTG_BASE, IRQ_DB5500_USBOTG, rx_cfg, tx_cfg) | 38 | ux500_add_usb(U5500_USBOTG_BASE, IRQ_DB5500_USBOTG, rx_cfg, tx_cfg) |
39 | 39 | ||
40 | #define db5500_add_sdi0(pdata) \ | 40 | #define db5500_add_sdi0(pdata) \ |
41 | dbx500_add_sdi("sdi0", U5500_SDI0_BASE, IRQ_DB5500_SDMMC0, pdata) | 41 | dbx500_add_sdi("sdi0", U5500_SDI0_BASE, IRQ_DB5500_SDMMC0, pdata, \ |
42 | 0x10480180) | ||
42 | #define db5500_add_sdi1(pdata) \ | 43 | #define db5500_add_sdi1(pdata) \ |
43 | dbx500_add_sdi("sdi1", U5500_SDI1_BASE, IRQ_DB5500_SDMMC1, pdata) | 44 | dbx500_add_sdi("sdi1", U5500_SDI1_BASE, IRQ_DB5500_SDMMC1, pdata, \ |
45 | 0x10480180) | ||
44 | #define db5500_add_sdi2(pdata) \ | 46 | #define db5500_add_sdi2(pdata) \ |
45 | dbx500_add_sdi("sdi2", U5500_SDI2_BASE, IRQ_DB5500_SDMMC2, pdata) | 47 | dbx500_add_sdi("sdi2", U5500_SDI2_BASE, IRQ_DB5500_SDMMC2, pdata \ |
48 | 0x10480180) | ||
46 | #define db5500_add_sdi3(pdata) \ | 49 | #define db5500_add_sdi3(pdata) \ |
47 | dbx500_add_sdi("sdi3", U5500_SDI3_BASE, IRQ_DB5500_SDMMC3, pdata) | 50 | dbx500_add_sdi("sdi3", U5500_SDI3_BASE, IRQ_DB5500_SDMMC3, pdata \ |
51 | 0x10480180) | ||
48 | #define db5500_add_sdi4(pdata) \ | 52 | #define db5500_add_sdi4(pdata) \ |
49 | dbx500_add_sdi("sdi4", U5500_SDI4_BASE, IRQ_DB5500_SDMMC4, pdata) | 53 | dbx500_add_sdi("sdi4", U5500_SDI4_BASE, IRQ_DB5500_SDMMC4, pdata \ |
54 | 0x10480180) | ||
50 | 55 | ||
56 | /* This one has a bad peripheral ID in the U5500 silicon */ | ||
51 | #define db5500_add_spi0(pdata) \ | 57 | #define db5500_add_spi0(pdata) \ |
52 | dbx500_add_spi("spi0", U5500_SPI0_BASE, IRQ_DB5500_SPI0, pdata) | 58 | dbx500_add_spi("spi0", U5500_SPI0_BASE, IRQ_DB5500_SPI0, pdata, \ |
59 | 0x10080023) | ||
53 | #define db5500_add_spi1(pdata) \ | 60 | #define db5500_add_spi1(pdata) \ |
54 | dbx500_add_spi("spi1", U5500_SPI1_BASE, IRQ_DB5500_SPI1, pdata) | 61 | dbx500_add_spi("spi1", U5500_SPI1_BASE, IRQ_DB5500_SPI1, pdata, \ |
62 | 0x10080023) | ||
55 | #define db5500_add_spi2(pdata) \ | 63 | #define db5500_add_spi2(pdata) \ |
56 | dbx500_add_spi("spi2", U5500_SPI2_BASE, IRQ_DB5500_SPI2, pdata) | 64 | dbx500_add_spi("spi2", U5500_SPI2_BASE, IRQ_DB5500_SPI2, pdata \ |
65 | 0x10080023) | ||
57 | #define db5500_add_spi3(pdata) \ | 66 | #define db5500_add_spi3(pdata) \ |
58 | dbx500_add_spi("spi3", U5500_SPI3_BASE, IRQ_DB5500_SPI3, pdata) | 67 | dbx500_add_spi("spi3", U5500_SPI3_BASE, IRQ_DB5500_SPI3, pdata \ |
68 | 0x10080023) | ||
59 | 69 | ||
60 | #define db5500_add_uart0(plat) \ | 70 | #define db5500_add_uart0(plat) \ |
61 | dbx500_add_uart("uart0", U5500_UART0_BASE, IRQ_DB5500_UART0, plat) | 71 | dbx500_add_uart("uart0", U5500_UART0_BASE, IRQ_DB5500_UART0, plat) |