aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-ux500/cpu.c
diff options
context:
space:
mode:
authorLinus Walleij <linus.walleij@linaro.org>2011-08-12 07:41:50 -0400
committerLinus Walleij <linus.walleij@linaro.org>2011-08-30 03:22:56 -0400
commit458eef2f4d73a55efa835ed891922e31efe91920 (patch)
tree1d6b2207a9d2f9dc0bfd6b96f9d946a895c90f93 /arch/arm/mach-ux500/cpu.c
parentfb0225871eea232fbfd2c4b356f5be172122a0fe (diff)
mach-ux500: factor out l2x0 handling code
Following mach-imx we break out the l2x0 handling into its own file, avoiding some ifdefs. Also remove unnecessary creation of local pointers when there is already one file-local readily available. Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-ux500/cpu.c')
-rw-r--r--arch/arm/mach-ux500/cpu.c69
1 files changed, 0 insertions, 69 deletions
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index 76ee3557ae3d..252e8b3c5706 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -11,8 +11,6 @@
11#include <linux/mfd/db8500-prcmu.h> 11#include <linux/mfd/db8500-prcmu.h>
12#include <linux/mfd/db5500-prcmu.h> 12#include <linux/mfd/db5500-prcmu.h>
13 13
14#include <asm/cacheflush.h>
15#include <asm/hardware/cache-l2x0.h>
16#include <asm/hardware/gic.h> 14#include <asm/hardware/gic.h>
17#include <asm/mach/map.h> 15#include <asm/mach/map.h>
18#include <asm/localtimer.h> 16#include <asm/localtimer.h>
@@ -26,10 +24,6 @@
26 24
27void __iomem *_PRCMU_BASE; 25void __iomem *_PRCMU_BASE;
28 26
29#ifdef CONFIG_CACHE_L2X0
30static void __iomem *l2x0_base;
31#endif
32
33void __init ux500_init_irq(void) 27void __init ux500_init_irq(void)
34{ 28{
35 void __iomem *dist_base; 29 void __iomem *dist_base;
@@ -57,69 +51,6 @@ void __init ux500_init_irq(void)
57 clk_init(); 51 clk_init();
58} 52}
59 53
60#ifdef CONFIG_CACHE_L2X0
61static inline void ux500_cache_wait(void __iomem *reg, unsigned long mask)
62{
63 /* wait for the operation to complete */
64 while (readl_relaxed(reg) & mask)
65 cpu_relax();
66}
67
68static inline void ux500_cache_sync(void)
69{
70 void __iomem *base = l2x0_base;
71
72 writel_relaxed(0, base + L2X0_CACHE_SYNC);
73 ux500_cache_wait(base + L2X0_CACHE_SYNC, 1);
74}
75
76/*
77 * The L2 cache cannot be turned off in the non-secure world.
78 * Dummy until a secure service is in place.
79 */
80static void ux500_l2x0_disable(void)
81{
82}
83
84/*
85 * This is only called when doing a kexec, just after turning off the L2
86 * and L1 cache, and it is surrounded by a spinlock in the generic version.
87 * However, we're not really turning off the L2 cache right now and the
88 * PL310 does not support exclusive accesses (used to implement the spinlock).
89 * So, the invalidation needs to be done without the spinlock.
90 */
91static void ux500_l2x0_inv_all(void)
92{
93 void __iomem *base = l2x0_base;
94 uint32_t l2x0_way_mask = (1<<16) - 1; /* Bitmask of active ways */
95
96 /* invalidate all ways */
97 writel_relaxed(l2x0_way_mask, base + L2X0_INV_WAY);
98 ux500_cache_wait(base + L2X0_INV_WAY, l2x0_way_mask);
99 ux500_cache_sync();
100}
101
102static int ux500_l2x0_init(void)
103{
104 if (cpu_is_u5500())
105 l2x0_base = __io_address(U5500_L2CC_BASE);
106 else if (cpu_is_u8500())
107 l2x0_base = __io_address(U8500_L2CC_BASE);
108 else
109 ux500_unknown_soc();
110
111 /* 64KB way size, 8 way associativity, force WA */
112 l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
113
114 /* Override invalidate function */
115 outer_cache.disable = ux500_l2x0_disable;
116 outer_cache.inv_all = ux500_l2x0_inv_all;
117
118 return 0;
119}
120early_initcall(ux500_l2x0_init);
121#endif
122
123static void __init ux500_timer_init(void) 54static void __init ux500_timer_init(void)
124{ 55{
125#ifdef CONFIG_LOCAL_TIMERS 56#ifdef CONFIG_LOCAL_TIMERS