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authorLinus Walleij <linus.walleij@stericsson.com>2010-05-26 02:38:54 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-05-27 05:36:08 -0400
commitba327b1e5296b70745e50bcf0446ae8f82e3d478 (patch)
tree294184ed993e00ee735dcedc13086a7daea0d2f6 /arch/arm/mach-ux500/clock.h
parentea208f646c8fb91c39c852e952fc911e1ad045ab (diff)
ARM: 6145/1: ux500 MTU clockrate correction
This adjusts the clockrate for the MTU timer. On the different UX500 variants this rate is different. The platform can also have been set up at hardware initialization, bootloader or early init for different clock speeds. To have the clock framework available early so the timers can use them, the clock initialization for Nomadik and ux500 is moved to IRQ init time. A custom per-clock callback is added to handle special cases like this. This solves a user-visible bug: without this patch the current UX500 platforms will not be synchronized to wall-clock time and the platform will drift in time. Acked-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-ux500/clock.h')
-rw-r--r--arch/arm/mach-ux500/clock.h22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/mach-ux500/clock.h b/arch/arm/mach-ux500/clock.h
index e4f99b65026f..a05802501527 100644
--- a/arch/arm/mach-ux500/clock.h
+++ b/arch/arm/mach-ux500/clock.h
@@ -28,6 +28,9 @@ struct clkops {
28 * @ops: pointer to clkops struct used to control this clock 28 * @ops: pointer to clkops struct used to control this clock
29 * @name: name, for debugging 29 * @name: name, for debugging
30 * @enabled: refcount. positive if enabled, zero if disabled 30 * @enabled: refcount. positive if enabled, zero if disabled
31 * @get_rate: custom callback for getting the clock rate
32 * @data: custom per-clock data for example for the get_rate
33 * callback
31 * @rate: fixed rate for clocks which don't implement 34 * @rate: fixed rate for clocks which don't implement
32 * ops->getrate 35 * ops->getrate
33 * @prcmu_cg_off: address offset of the combined enable/disable register 36 * @prcmu_cg_off: address offset of the combined enable/disable register
@@ -67,6 +70,8 @@ struct clk {
67 const struct clkops *ops; 70 const struct clkops *ops;
68 const char *name; 71 const char *name;
69 unsigned int enabled; 72 unsigned int enabled;
73 unsigned long (*get_rate)(struct clk *);
74 void *data;
70 75
71 unsigned long rate; 76 unsigned long rate;
72 struct list_head list; 77 struct list_head list;
@@ -117,9 +122,26 @@ struct clk clk_##_name = { \
117 .parent_periph = _kernclk \ 122 .parent_periph = _kernclk \
118 } 123 }
119 124
125#define DEFINE_PRCC_CLK_CUSTOM(_pclust, _name, _bus_en, _kernel_en, _kernclk, _callback, _data) \
126struct clk clk_##_name = { \
127 .name = #_name, \
128 .ops = &clk_prcc_ops, \
129 .cluster = _pclust, \
130 .prcc_bus = _bus_en, \
131 .prcc_kernel = _kernel_en, \
132 .parent_cluster = &clk_per##_pclust##clk, \
133 .parent_periph = _kernclk, \
134 .get_rate = _callback, \
135 .data = (void *) _data \
136 }
137
138
120#define CLK(_clk, _devname, _conname) \ 139#define CLK(_clk, _devname, _conname) \
121 { \ 140 { \
122 .clk = &clk_##_clk, \ 141 .clk = &clk_##_clk, \
123 .dev_id = _devname, \ 142 .dev_id = _devname, \
124 .con_id = _conname, \ 143 .con_id = _conname, \
125 } 144 }
145
146int __init clk_db8500_ed_fixup(void);
147int __init clk_init(void);