diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2012-08-13 04:11:15 -0400 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2012-08-13 07:53:04 -0400 |
commit | fcb28d2e9db7f1fc146a6e95200f166a86224066 (patch) | |
tree | 37e94239af87349e6463ad0d2cfdfc8d1ce22e3f /arch/arm/mach-u300 | |
parent | 0d7614f09c1ebdbaa1599a5aba7593f147bf96ee (diff) |
ARM: u300: retire ancient platforms
This retires the B26/S26, B330/S330 and B365/S365 boards from
the U300 platform. The only board really used anywhere today
is the S335 so let's concentrate any efforts on that one board.
Also the board variants are selected at compile-time, which is
strictly a no-no these days, if multi-board support is to be
brought back it need to happen using run-time and device tree.
My work on ARM Linux started on the B26/S26 so it's a bit sad
to see it go, but there is a time to move on with all things
in life.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-u300')
-rw-r--r-- | arch/arm/mach-u300/Kconfig | 43 | ||||
-rw-r--r-- | arch/arm/mach-u300/core.c | 70 | ||||
-rw-r--r-- | arch/arm/mach-u300/i2c.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-u300/include/mach/dma_channels.h | 11 | ||||
-rw-r--r-- | arch/arm/mach-u300/include/mach/irqs.h | 34 | ||||
-rw-r--r-- | arch/arm/mach-u300/include/mach/syscon.h | 32 | ||||
-rw-r--r-- | arch/arm/mach-u300/include/mach/u300-regs.h | 19 | ||||
-rw-r--r-- | arch/arm/mach-u300/u300-gpio.h | 46 | ||||
-rw-r--r-- | arch/arm/mach-u300/u300.c | 18 |
9 files changed, 14 insertions, 265 deletions
diff --git a/arch/arm/mach-u300/Kconfig b/arch/arm/mach-u300/Kconfig index 54d8f34fdee5..f7e12ede008c 100644 --- a/arch/arm/mach-u300/Kconfig +++ b/arch/arm/mach-u300/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | if ARCH_U300 | 1 | if ARCH_U300 |
2 | 2 | ||
3 | menu "ST-Ericsson AB U300/U330/U335/U365 Platform" | 3 | menu "ST-Ericsson AB U300/U335 Platform" |
4 | 4 | ||
5 | comment "ST-Ericsson Mobile Platform Products" | 5 | comment "ST-Ericsson Mobile Platform Products" |
6 | 6 | ||
@@ -10,46 +10,7 @@ config MACH_U300 | |||
10 | select PINCTRL_U300 | 10 | select PINCTRL_U300 |
11 | select PINCTRL_COH901 | 11 | select PINCTRL_COH901 |
12 | 12 | ||
13 | comment "ST-Ericsson U300/U330/U335/U365 Feature Selections" | 13 | comment "ST-Ericsson U300/U335 Feature Selections" |
14 | |||
15 | choice | ||
16 | prompt "U300/U330/U335/U365 system type" | ||
17 | default MACH_U300_BS2X | ||
18 | ---help--- | ||
19 | You need to select the target system, i.e. the | ||
20 | U300/U330/U335/U365 board that you want to compile your kernel | ||
21 | for. | ||
22 | |||
23 | config MACH_U300_BS2X | ||
24 | bool "S26/S26/B25/B26 Test Products" | ||
25 | depends on MACH_U300 | ||
26 | help | ||
27 | Select this if you're developing on the | ||
28 | S26/S25 test products. (Also works on | ||
29 | B26/B25 big boards.) | ||
30 | |||
31 | config MACH_U300_BS330 | ||
32 | bool "S330/B330 Test Products" | ||
33 | depends on MACH_U300 | ||
34 | help | ||
35 | Select this if you're developing on the | ||
36 | S330/B330 test products. | ||
37 | |||
38 | config MACH_U300_BS335 | ||
39 | bool "S335/B335 Test Products" | ||
40 | depends on MACH_U300 | ||
41 | help | ||
42 | Select this if you're developing on the | ||
43 | S335/B335 test products. | ||
44 | |||
45 | config MACH_U300_BS365 | ||
46 | bool "S365/B365 Test Products" | ||
47 | depends on MACH_U300 | ||
48 | help | ||
49 | Select this if you're developing on the | ||
50 | S365/B365 test products. | ||
51 | |||
52 | endchoice | ||
53 | 14 | ||
54 | config U300_DEBUG | 15 | config U300_DEBUG |
55 | bool "Debug support for U300" | 16 | bool "Debug support for U300" |
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index 03acf1883ec7..17940754446e 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * arch/arm/mach-u300/core.c | 3 | * arch/arm/mach-u300/core.c |
4 | * | 4 | * |
5 | * | 5 | * |
6 | * Copyright (C) 2007-2010 ST-Ericsson SA | 6 | * Copyright (C) 2007-2012 ST-Ericsson SA |
7 | * License terms: GNU General Public License (GPL) version 2 | 7 | * License terms: GNU General Public License (GPL) version 2 |
8 | * Core platform support, IRQ handling and device definitions. | 8 | * Core platform support, IRQ handling and device definitions. |
9 | * Author: Linus Walleij <linus.walleij@stericsson.com> | 9 | * Author: Linus Walleij <linus.walleij@stericsson.com> |
@@ -101,7 +101,6 @@ static AMBA_APB_DEVICE(uart0, "uart0", 0, U300_UART0_BASE, | |||
101 | { IRQ_U300_UART0 }, &uart0_plat_data); | 101 | { IRQ_U300_UART0 }, &uart0_plat_data); |
102 | 102 | ||
103 | /* The U335 have an additional UART1 on the APP CPU */ | 103 | /* The U335 have an additional UART1 on the APP CPU */ |
104 | #ifdef CONFIG_MACH_U300_BS335 | ||
105 | static struct amba_pl011_data uart1_plat_data = { | 104 | static struct amba_pl011_data uart1_plat_data = { |
106 | #ifdef CONFIG_COH901318 | 105 | #ifdef CONFIG_COH901318 |
107 | .dma_filter = coh901318_filter_id, | 106 | .dma_filter = coh901318_filter_id, |
@@ -113,7 +112,6 @@ static struct amba_pl011_data uart1_plat_data = { | |||
113 | /* Fast device at 0x7000 offset */ | 112 | /* Fast device at 0x7000 offset */ |
114 | static AMBA_APB_DEVICE(uart1, "uart1", 0, U300_UART1_BASE, | 113 | static AMBA_APB_DEVICE(uart1, "uart1", 0, U300_UART1_BASE, |
115 | { IRQ_U300_UART1 }, &uart1_plat_data); | 114 | { IRQ_U300_UART1 }, &uart1_plat_data); |
116 | #endif | ||
117 | 115 | ||
118 | /* AHB device at 0x4000 offset */ | 116 | /* AHB device at 0x4000 offset */ |
119 | static AMBA_APB_DEVICE(pl172, "pl172", 0, U300_EMIF_CFG_BASE, { }, NULL); | 117 | static AMBA_APB_DEVICE(pl172, "pl172", 0, U300_EMIF_CFG_BASE, { }, NULL); |
@@ -152,9 +150,7 @@ static AMBA_APB_DEVICE(mmcsd, "mmci", 0, U300_MMCSD_BASE, | |||
152 | */ | 150 | */ |
153 | static struct amba_device *amba_devs[] __initdata = { | 151 | static struct amba_device *amba_devs[] __initdata = { |
154 | &uart0_device, | 152 | &uart0_device, |
155 | #ifdef CONFIG_MACH_U300_BS335 | ||
156 | &uart1_device, | 153 | &uart1_device, |
157 | #endif | ||
158 | &pl022_device, | 154 | &pl022_device, |
159 | &pl172_device, | 155 | &pl172_device, |
160 | &mmcsd_device, | 156 | &mmcsd_device, |
@@ -188,7 +184,6 @@ static struct resource gpio_resources[] = { | |||
188 | .end = IRQ_U300_GPIO_PORT2, | 184 | .end = IRQ_U300_GPIO_PORT2, |
189 | .flags = IORESOURCE_IRQ, | 185 | .flags = IORESOURCE_IRQ, |
190 | }, | 186 | }, |
191 | #if defined(CONFIG_MACH_U300_BS365) || defined(CONFIG_MACH_U300_BS335) | ||
192 | { | 187 | { |
193 | .name = "gpio3", | 188 | .name = "gpio3", |
194 | .start = IRQ_U300_GPIO_PORT3, | 189 | .start = IRQ_U300_GPIO_PORT3, |
@@ -201,8 +196,6 @@ static struct resource gpio_resources[] = { | |||
201 | .end = IRQ_U300_GPIO_PORT4, | 196 | .end = IRQ_U300_GPIO_PORT4, |
202 | .flags = IORESOURCE_IRQ, | 197 | .flags = IORESOURCE_IRQ, |
203 | }, | 198 | }, |
204 | #endif | ||
205 | #ifdef CONFIG_MACH_U300_BS335 | ||
206 | { | 199 | { |
207 | .name = "gpio5", | 200 | .name = "gpio5", |
208 | .start = IRQ_U300_GPIO_PORT5, | 201 | .start = IRQ_U300_GPIO_PORT5, |
@@ -215,7 +208,6 @@ static struct resource gpio_resources[] = { | |||
215 | .end = IRQ_U300_GPIO_PORT6, | 208 | .end = IRQ_U300_GPIO_PORT6, |
216 | .flags = IORESOURCE_IRQ, | 209 | .flags = IORESOURCE_IRQ, |
217 | }, | 210 | }, |
218 | #endif /* CONFIG_MACH_U300_BS335 */ | ||
219 | }; | 211 | }; |
220 | 212 | ||
221 | static struct resource keypad_resources[] = { | 213 | static struct resource keypad_resources[] = { |
@@ -323,7 +315,6 @@ static struct resource dma_resource[] = { | |||
323 | } | 315 | } |
324 | }; | 316 | }; |
325 | 317 | ||
326 | #ifdef CONFIG_MACH_U300_BS335 | ||
327 | /* points out all dma slave channels. | 318 | /* points out all dma slave channels. |
328 | * Syntax is [A1, B1, A2, B2, .... ,-1,-1] | 319 | * Syntax is [A1, B1, A2, B2, .... ,-1,-1] |
329 | * Select all channels from A to B, end of list is marked with -1,-1 | 320 | * Select all channels from A to B, end of list is marked with -1,-1 |
@@ -336,14 +327,6 @@ static int dma_slave_channels[] = { | |||
336 | static int dma_memcpy_channels[] = { | 327 | static int dma_memcpy_channels[] = { |
337 | U300_DMA_GENERAL_PURPOSE_0, U300_DMA_GENERAL_PURPOSE_8, -1, -1}; | 328 | U300_DMA_GENERAL_PURPOSE_0, U300_DMA_GENERAL_PURPOSE_8, -1, -1}; |
338 | 329 | ||
339 | #else /* CONFIG_MACH_U300_BS335 */ | ||
340 | |||
341 | static int dma_slave_channels[] = {U300_DMA_MSL_TX_0, U300_DMA_SPI_RX, -1, -1}; | ||
342 | static int dma_memcpy_channels[] = { | ||
343 | U300_DMA_GENERAL_PURPOSE_0, U300_DMA_GENERAL_PURPOSE_10, -1, -1}; | ||
344 | |||
345 | #endif | ||
346 | |||
347 | /** register dma for memory access | 330 | /** register dma for memory access |
348 | * | 331 | * |
349 | * active 1 means dma intends to access memory | 332 | * active 1 means dma intends to access memory |
@@ -1395,7 +1378,6 @@ const struct coh_dma_channel chan_config[U300_DMA_CHANNELS] = { | |||
1395 | .param.ctrl_lli = flags_memcpy_lli, | 1378 | .param.ctrl_lli = flags_memcpy_lli, |
1396 | .param.ctrl_lli_last = flags_memcpy_lli_last, | 1379 | .param.ctrl_lli_last = flags_memcpy_lli_last, |
1397 | }, | 1380 | }, |
1398 | #ifdef CONFIG_MACH_U300_BS335 | ||
1399 | { | 1381 | { |
1400 | .number = U300_DMA_UART1_TX, | 1382 | .number = U300_DMA_UART1_TX, |
1401 | .name = "UART1 TX", | 1383 | .name = "UART1 TX", |
@@ -1406,28 +1388,6 @@ const struct coh_dma_channel chan_config[U300_DMA_CHANNELS] = { | |||
1406 | .name = "UART1 RX", | 1388 | .name = "UART1 RX", |
1407 | .priority_high = 0, | 1389 | .priority_high = 0, |
1408 | } | 1390 | } |
1409 | #else | ||
1410 | { | ||
1411 | .number = U300_DMA_GENERAL_PURPOSE_9, | ||
1412 | .name = "GENERAL 09", | ||
1413 | .priority_high = 0, | ||
1414 | |||
1415 | .param.config = flags_memcpy_config, | ||
1416 | .param.ctrl_lli_chained = flags_memcpy_lli_chained, | ||
1417 | .param.ctrl_lli = flags_memcpy_lli, | ||
1418 | .param.ctrl_lli_last = flags_memcpy_lli_last, | ||
1419 | }, | ||
1420 | { | ||
1421 | .number = U300_DMA_GENERAL_PURPOSE_10, | ||
1422 | .name = "GENERAL 10", | ||
1423 | .priority_high = 0, | ||
1424 | |||
1425 | .param.config = flags_memcpy_config, | ||
1426 | .param.ctrl_lli_chained = flags_memcpy_lli_chained, | ||
1427 | .param.ctrl_lli = flags_memcpy_lli, | ||
1428 | .param.ctrl_lli_last = flags_memcpy_lli_last, | ||
1429 | } | ||
1430 | #endif | ||
1431 | }; | 1391 | }; |
1432 | 1392 | ||
1433 | 1393 | ||
@@ -1480,18 +1440,8 @@ static struct platform_device pinctrl_device = { | |||
1480 | * GPIO block, with different number of ports. | 1440 | * GPIO block, with different number of ports. |
1481 | */ | 1441 | */ |
1482 | static struct u300_gpio_platform u300_gpio_plat = { | 1442 | static struct u300_gpio_platform u300_gpio_plat = { |
1483 | #if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) | ||
1484 | .variant = U300_GPIO_COH901335, | ||
1485 | .ports = 3, | ||
1486 | #endif | ||
1487 | #ifdef CONFIG_MACH_U300_BS335 | ||
1488 | .variant = U300_GPIO_COH901571_3_BS335, | 1443 | .variant = U300_GPIO_COH901571_3_BS335, |
1489 | .ports = 7, | 1444 | .ports = 7, |
1490 | #endif | ||
1491 | #ifdef CONFIG_MACH_U300_BS365 | ||
1492 | .variant = U300_GPIO_COH901571_3_BS365, | ||
1493 | .ports = 5, | ||
1494 | #endif | ||
1495 | .gpio_base = 0, | 1445 | .gpio_base = 0, |
1496 | .gpio_irq_base = IRQ_U300_GPIO_BASE, | 1446 | .gpio_irq_base = IRQ_U300_GPIO_BASE, |
1497 | .pinctrl_device = &pinctrl_device, | 1447 | .pinctrl_device = &pinctrl_device, |
@@ -1756,29 +1706,11 @@ static void __init u300_init_check_chip(void) | |||
1756 | printk(KERN_INFO "Initializing U300 system on %s baseband chip " \ | 1706 | printk(KERN_INFO "Initializing U300 system on %s baseband chip " \ |
1757 | "(chip ID 0x%04x)\n", chipname, val); | 1707 | "(chip ID 0x%04x)\n", chipname, val); |
1758 | 1708 | ||
1759 | #ifdef CONFIG_MACH_U300_BS330 | ||
1760 | if ((val & 0xFF00U) != 0xd800) { | ||
1761 | printk(KERN_ERR "Platform configured for BS330 " \ | ||
1762 | "with DB3200 but %s detected, expect problems!", | ||
1763 | chipname); | ||
1764 | } | ||
1765 | #endif | ||
1766 | #ifdef CONFIG_MACH_U300_BS335 | ||
1767 | if ((val & 0xFF00U) != 0xf000 && (val & 0xFF00U) != 0xf100) { | 1709 | if ((val & 0xFF00U) != 0xf000 && (val & 0xFF00U) != 0xf100) { |
1768 | printk(KERN_ERR "Platform configured for BS335 " \ | 1710 | printk(KERN_ERR "Platform configured for BS335 " \ |
1769 | " with DB3350 but %s detected, expect problems!", | 1711 | " with DB3350 but %s detected, expect problems!", |
1770 | chipname); | 1712 | chipname); |
1771 | } | 1713 | } |
1772 | #endif | ||
1773 | #ifdef CONFIG_MACH_U300_BS365 | ||
1774 | if ((val & 0xFF00U) != 0xe800) { | ||
1775 | printk(KERN_ERR "Platform configured for BS365 " \ | ||
1776 | "with DB3210 but %s detected, expect problems!", | ||
1777 | chipname); | ||
1778 | } | ||
1779 | #endif | ||
1780 | |||
1781 | |||
1782 | } | 1714 | } |
1783 | 1715 | ||
1784 | /* | 1716 | /* |
diff --git a/arch/arm/mach-u300/i2c.c b/arch/arm/mach-u300/i2c.c index cb04bd6ab3e7..0d4620ed853c 100644 --- a/arch/arm/mach-u300/i2c.c +++ b/arch/arm/mach-u300/i2c.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * arch/arm/mach-u300/i2c.c | 2 | * arch/arm/mach-u300/i2c.c |
3 | * | 3 | * |
4 | * Copyright (C) 2009 ST-Ericsson AB | 4 | * Copyright (C) 2009-2012 ST-Ericsson AB |
5 | * License terms: GNU General Public License (GPL) version 2 | 5 | * License terms: GNU General Public License (GPL) version 2 |
6 | * | 6 | * |
7 | * Register board i2c devices | 7 | * Register board i2c devices |
@@ -261,7 +261,6 @@ static struct i2c_board_info __initdata bus0_i2c_board_info[] = { | |||
261 | }; | 261 | }; |
262 | 262 | ||
263 | static struct i2c_board_info __initdata bus1_i2c_board_info[] = { | 263 | static struct i2c_board_info __initdata bus1_i2c_board_info[] = { |
264 | #ifdef CONFIG_MACH_U300_BS335 | ||
265 | { | 264 | { |
266 | .type = "fwcam", | 265 | .type = "fwcam", |
267 | .addr = 0x10, | 266 | .addr = 0x10, |
@@ -270,9 +269,6 @@ static struct i2c_board_info __initdata bus1_i2c_board_info[] = { | |||
270 | .type = "fwcam", | 269 | .type = "fwcam", |
271 | .addr = 0x5d, | 270 | .addr = 0x5d, |
272 | }, | 271 | }, |
273 | #else | ||
274 | { }, | ||
275 | #endif | ||
276 | }; | 272 | }; |
277 | 273 | ||
278 | void __init u300_i2c_register_board_devices(void) | 274 | void __init u300_i2c_register_board_devices(void) |
diff --git a/arch/arm/mach-u300/include/mach/dma_channels.h b/arch/arm/mach-u300/include/mach/dma_channels.h index b239149ba0d0..4e8a88fbca49 100644 --- a/arch/arm/mach-u300/include/mach/dma_channels.h +++ b/arch/arm/mach-u300/include/mach/dma_channels.h | |||
@@ -3,7 +3,7 @@ | |||
3 | * arch/arm/mach-u300/include/mach/dma_channels.h | 3 | * arch/arm/mach-u300/include/mach/dma_channels.h |
4 | * | 4 | * |
5 | * | 5 | * |
6 | * Copyright (C) 2007-2009 ST-Ericsson | 6 | * Copyright (C) 2007-2012 ST-Ericsson |
7 | * License terms: GNU General Public License (GPL) version 2 | 7 | * License terms: GNU General Public License (GPL) version 2 |
8 | * Map file for the U300 dma driver. | 8 | * Map file for the U300 dma driver. |
9 | * Author: Per Friden <per.friden@stericsson.com> | 9 | * Author: Per Friden <per.friden@stericsson.com> |
@@ -50,19 +50,10 @@ | |||
50 | #define U300_DMA_GENERAL_PURPOSE_6 35 | 50 | #define U300_DMA_GENERAL_PURPOSE_6 35 |
51 | #define U300_DMA_GENERAL_PURPOSE_7 36 | 51 | #define U300_DMA_GENERAL_PURPOSE_7 36 |
52 | #define U300_DMA_GENERAL_PURPOSE_8 37 | 52 | #define U300_DMA_GENERAL_PURPOSE_8 37 |
53 | #ifdef CONFIG_MACH_U300_BS335 | ||
54 | #define U300_DMA_UART1_TX 38 | 53 | #define U300_DMA_UART1_TX 38 |
55 | #define U300_DMA_UART1_RX 39 | 54 | #define U300_DMA_UART1_RX 39 |
56 | #else | ||
57 | #define U300_DMA_GENERAL_PURPOSE_9 38 | ||
58 | #define U300_DMA_GENERAL_PURPOSE_10 39 | ||
59 | #endif | ||
60 | 55 | ||
61 | #ifdef CONFIG_MACH_U300_BS335 | ||
62 | #define U300_DMA_DEVICE_CHANNELS 32 | 56 | #define U300_DMA_DEVICE_CHANNELS 32 |
63 | #else | ||
64 | #define U300_DMA_DEVICE_CHANNELS 30 | ||
65 | #endif | ||
66 | #define U300_DMA_CHANNELS 40 | 57 | #define U300_DMA_CHANNELS 40 |
67 | 58 | ||
68 | 59 | ||
diff --git a/arch/arm/mach-u300/include/mach/irqs.h b/arch/arm/mach-u300/include/mach/irqs.h index ec09c1e07b1a..c09386bca206 100644 --- a/arch/arm/mach-u300/include/mach/irqs.h +++ b/arch/arm/mach-u300/include/mach/irqs.h | |||
@@ -3,7 +3,7 @@ | |||
3 | * arch/arm/mach-u300/include/mach/irqs.h | 3 | * arch/arm/mach-u300/include/mach/irqs.h |
4 | * | 4 | * |
5 | * | 5 | * |
6 | * Copyright (C) 2006-2009 ST-Ericsson AB | 6 | * Copyright (C) 2006-2012 ST-Ericsson AB |
7 | * License terms: GNU General Public License (GPL) version 2 | 7 | * License terms: GNU General Public License (GPL) version 2 |
8 | * IRQ channel definitions for the U300 platforms. | 8 | * IRQ channel definitions for the U300 platforms. |
9 | * Author: Linus Walleij <linus.walleij@stericsson.com> | 9 | * Author: Linus Walleij <linus.walleij@stericsson.com> |
@@ -31,10 +31,6 @@ | |||
31 | #define IRQ_U300_XGAM_GAMCON 14 | 31 | #define IRQ_U300_XGAM_GAMCON 14 |
32 | #define IRQ_U300_XGAM_CDI 15 | 32 | #define IRQ_U300_XGAM_CDI 15 |
33 | #define IRQ_U300_XGAM_CDICON 16 | 33 | #define IRQ_U300_XGAM_CDICON 16 |
34 | #if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) | ||
35 | /* MMIACC not used on the DB3210 or DB3350 chips */ | ||
36 | #define IRQ_U300_XGAM_MMIACC 17 | ||
37 | #endif | ||
38 | #define IRQ_U300_XGAM_PDI 18 | 34 | #define IRQ_U300_XGAM_PDI 18 |
39 | #define IRQ_U300_XGAM_PDICON 19 | 35 | #define IRQ_U300_XGAM_PDICON 19 |
40 | #define IRQ_U300_XGAM_GAMEACC 20 | 36 | #define IRQ_U300_XGAM_GAMEACC 20 |
@@ -55,8 +51,6 @@ | |||
55 | #define IRQ_U300_GPIO_PORT1 34 | 51 | #define IRQ_U300_GPIO_PORT1 34 |
56 | #define IRQ_U300_GPIO_PORT2 35 | 52 | #define IRQ_U300_GPIO_PORT2 35 |
57 | 53 | ||
58 | #if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) || \ | ||
59 | defined(CONFIG_MACH_U300_BS335) | ||
60 | /* These are for DB3150, DB3200 and DB3350 */ | 54 | /* These are for DB3150, DB3200 and DB3350 */ |
61 | #define IRQ_U300_WDOG 36 | 55 | #define IRQ_U300_WDOG 36 |
62 | #define IRQ_U300_EVHIST 37 | 56 | #define IRQ_U300_EVHIST 37 |
@@ -68,15 +62,8 @@ | |||
68 | #define IRQ_U300_RTC 43 | 62 | #define IRQ_U300_RTC 43 |
69 | #define IRQ_U300_NFIF 44 | 63 | #define IRQ_U300_NFIF 44 |
70 | #define IRQ_U300_NFIF2 45 | 64 | #define IRQ_U300_NFIF2 45 |
71 | #endif | ||
72 | |||
73 | /* DB3150 and DB3200 have only 45 IRQs */ | ||
74 | #if defined(CONFIG_MACH_U300_BS2X) || defined(CONFIG_MACH_U300_BS330) | ||
75 | #define U300_VIC_IRQS_END 46 | ||
76 | #endif | ||
77 | 65 | ||
78 | /* The DB3350-specific interrupt lines */ | 66 | /* The DB3350-specific interrupt lines */ |
79 | #ifdef CONFIG_MACH_U300_BS335 | ||
80 | #define IRQ_U300_ISP_F0 46 | 67 | #define IRQ_U300_ISP_F0 46 |
81 | #define IRQ_U300_ISP_F1 47 | 68 | #define IRQ_U300_ISP_F1 47 |
82 | #define IRQ_U300_ISP_F2 48 | 69 | #define IRQ_U300_ISP_F2 48 |
@@ -89,25 +76,6 @@ | |||
89 | #define IRQ_U300_GPIO_PORT5 55 | 76 | #define IRQ_U300_GPIO_PORT5 55 |
90 | #define IRQ_U300_GPIO_PORT6 56 | 77 | #define IRQ_U300_GPIO_PORT6 56 |
91 | #define U300_VIC_IRQS_END 57 | 78 | #define U300_VIC_IRQS_END 57 |
92 | #endif | ||
93 | |||
94 | /* The DB3210-specific interrupt lines */ | ||
95 | #ifdef CONFIG_MACH_U300_BS365 | ||
96 | #define IRQ_U300_GPIO_PORT3 36 | ||
97 | #define IRQ_U300_GPIO_PORT4 37 | ||
98 | #define IRQ_U300_WDOG 38 | ||
99 | #define IRQ_U300_EVHIST 39 | ||
100 | #define IRQ_U300_MSPRO 40 | ||
101 | #define IRQ_U300_MMCSD_MCIINTR0 41 | ||
102 | #define IRQ_U300_MMCSD_MCIINTR1 42 | ||
103 | #define IRQ_U300_I2C0 43 | ||
104 | #define IRQ_U300_I2C1 44 | ||
105 | #define IRQ_U300_RTC 45 | ||
106 | #define IRQ_U300_NFIF 46 | ||
107 | #define IRQ_U300_NFIF2 47 | ||
108 | #define IRQ_U300_SYSCON_PLL_LOCK 48 | ||
109 | #define U300_VIC_IRQS_END 49 | ||
110 | #endif | ||
111 | 79 | ||
112 | /* Maximum 8*7 GPIO lines */ | 80 | /* Maximum 8*7 GPIO lines */ |
113 | #ifdef CONFIG_PINCTRL_COH901 | 81 | #ifdef CONFIG_PINCTRL_COH901 |
diff --git a/arch/arm/mach-u300/include/mach/syscon.h b/arch/arm/mach-u300/include/mach/syscon.h index 6e84f07a7c6f..10bdd0be9774 100644 --- a/arch/arm/mach-u300/include/mach/syscon.h +++ b/arch/arm/mach-u300/include/mach/syscon.h | |||
@@ -3,7 +3,7 @@ | |||
3 | * arch/arm/mach-u300/include/mach/syscon.h | 3 | * arch/arm/mach-u300/include/mach/syscon.h |
4 | * | 4 | * |
5 | * | 5 | * |
6 | * Copyright (C) 2008 ST-Ericsson AB | 6 | * Copyright (C) 2008-2012 ST-Ericsson AB |
7 | * | 7 | * |
8 | * Author: Rickard Andersson <rickard.andersson@stericsson.com> | 8 | * Author: Rickard Andersson <rickard.andersson@stericsson.com> |
9 | */ | 9 | */ |
@@ -36,9 +36,7 @@ | |||
36 | #define U300_SYSCON_CSR_PLL13_LOCK_IND (0x0001) | 36 | #define U300_SYSCON_CSR_PLL13_LOCK_IND (0x0001) |
37 | /* Reset lines for SLOW devices 16bit (R/W) */ | 37 | /* Reset lines for SLOW devices 16bit (R/W) */ |
38 | #define U300_SYSCON_RSR (0x0014) | 38 | #define U300_SYSCON_RSR (0x0014) |
39 | #ifdef CONFIG_MACH_U300_BS335 | ||
40 | #define U300_SYSCON_RSR_PPM_RESET_EN (0x0200) | 39 | #define U300_SYSCON_RSR_PPM_RESET_EN (0x0200) |
41 | #endif | ||
42 | #define U300_SYSCON_RSR_ACC_TMR_RESET_EN (0x0100) | 40 | #define U300_SYSCON_RSR_ACC_TMR_RESET_EN (0x0100) |
43 | #define U300_SYSCON_RSR_APP_TMR_RESET_EN (0x0080) | 41 | #define U300_SYSCON_RSR_APP_TMR_RESET_EN (0x0080) |
44 | #define U300_SYSCON_RSR_RTC_RESET_EN (0x0040) | 42 | #define U300_SYSCON_RSR_RTC_RESET_EN (0x0040) |
@@ -50,9 +48,7 @@ | |||
50 | #define U300_SYSCON_RSR_SLOW_BRIDGE_RESET_EN (0x0001) | 48 | #define U300_SYSCON_RSR_SLOW_BRIDGE_RESET_EN (0x0001) |
51 | /* Reset lines for FAST devices 16bit (R/W) */ | 49 | /* Reset lines for FAST devices 16bit (R/W) */ |
52 | #define U300_SYSCON_RFR (0x0018) | 50 | #define U300_SYSCON_RFR (0x0018) |
53 | #ifdef CONFIG_MACH_U300_BS335 | ||
54 | #define U300_SYSCON_RFR_UART1_RESET_ENABLE (0x0080) | 51 | #define U300_SYSCON_RFR_UART1_RESET_ENABLE (0x0080) |
55 | #endif | ||
56 | #define U300_SYSCON_RFR_SPI_RESET_ENABLE (0x0040) | 52 | #define U300_SYSCON_RFR_SPI_RESET_ENABLE (0x0040) |
57 | #define U300_SYSCON_RFR_MMC_RESET_ENABLE (0x0020) | 53 | #define U300_SYSCON_RFR_MMC_RESET_ENABLE (0x0020) |
58 | #define U300_SYSCON_RFR_PCM_I2S1_RESET_ENABLE (0x0010) | 54 | #define U300_SYSCON_RFR_PCM_I2S1_RESET_ENABLE (0x0010) |
@@ -62,10 +58,8 @@ | |||
62 | #define U300_SYSCON_RFR_FAST_BRIDGE_RESET_ENABLE (0x0001) | 58 | #define U300_SYSCON_RFR_FAST_BRIDGE_RESET_ENABLE (0x0001) |
63 | /* Reset lines for the rest of the peripherals 16bit (R/W) */ | 59 | /* Reset lines for the rest of the peripherals 16bit (R/W) */ |
64 | #define U300_SYSCON_RRR (0x001c) | 60 | #define U300_SYSCON_RRR (0x001c) |
65 | #ifdef CONFIG_MACH_U300_BS335 | ||
66 | #define U300_SYSCON_RRR_CDS_RESET_EN (0x4000) | 61 | #define U300_SYSCON_RRR_CDS_RESET_EN (0x4000) |
67 | #define U300_SYSCON_RRR_ISP_RESET_EN (0x2000) | 62 | #define U300_SYSCON_RRR_ISP_RESET_EN (0x2000) |
68 | #endif | ||
69 | #define U300_SYSCON_RRR_INTCON_RESET_EN (0x1000) | 63 | #define U300_SYSCON_RRR_INTCON_RESET_EN (0x1000) |
70 | #define U300_SYSCON_RRR_MSPRO_RESET_EN (0x0800) | 64 | #define U300_SYSCON_RRR_MSPRO_RESET_EN (0x0800) |
71 | #define U300_SYSCON_RRR_XGAM_RESET_EN (0x0100) | 65 | #define U300_SYSCON_RRR_XGAM_RESET_EN (0x0100) |
@@ -79,9 +73,7 @@ | |||
79 | #define U300_SYSCON_RRR_AAIF_RESET_EN (0x0001) | 73 | #define U300_SYSCON_RRR_AAIF_RESET_EN (0x0001) |
80 | /* Clock enable for SLOW peripherals 16bit (R/W) */ | 74 | /* Clock enable for SLOW peripherals 16bit (R/W) */ |
81 | #define U300_SYSCON_CESR (0x0020) | 75 | #define U300_SYSCON_CESR (0x0020) |
82 | #ifdef CONFIG_MACH_U300_BS335 | ||
83 | #define U300_SYSCON_CESR_PPM_CLK_EN (0x0200) | 76 | #define U300_SYSCON_CESR_PPM_CLK_EN (0x0200) |
84 | #endif | ||
85 | #define U300_SYSCON_CESR_ACC_TMR_CLK_EN (0x0100) | 77 | #define U300_SYSCON_CESR_ACC_TMR_CLK_EN (0x0100) |
86 | #define U300_SYSCON_CESR_APP_TMR_CLK_EN (0x0080) | 78 | #define U300_SYSCON_CESR_APP_TMR_CLK_EN (0x0080) |
87 | #define U300_SYSCON_CESR_KEYPAD_CLK_EN (0x0040) | 79 | #define U300_SYSCON_CESR_KEYPAD_CLK_EN (0x0040) |
@@ -92,24 +84,20 @@ | |||
92 | #define U300_SYSCON_CESR_SLOW_BRIDGE_CLK_EN (0x0001) | 84 | #define U300_SYSCON_CESR_SLOW_BRIDGE_CLK_EN (0x0001) |
93 | /* Clock enable for FAST peripherals 16bit (R/W) */ | 85 | /* Clock enable for FAST peripherals 16bit (R/W) */ |
94 | #define U300_SYSCON_CEFR (0x0024) | 86 | #define U300_SYSCON_CEFR (0x0024) |
95 | #ifdef CONFIG_MACH_U300_BS335 | ||
96 | #define U300_SYSCON_CEFR_UART1_CLK_EN (0x0200) | 87 | #define U300_SYSCON_CEFR_UART1_CLK_EN (0x0200) |
97 | #endif | ||
98 | #define U300_SYSCON_CEFR_I2S1_CORE_CLK_EN (0x0100) | 88 | #define U300_SYSCON_CEFR_I2S1_CORE_CLK_EN (0x0100) |
99 | #define U300_SYSCON_CEFR_I2S0_CORE_CLK_EN (0x0080) | 89 | #define U300_SYSCON_CEFR_I2S0_CORE_CLK_EN (0x0080) |
100 | #define U300_SYSCON_CEFR_SPI_CLK_EN (0x0040) | 90 | #define U300_SYSCON_CEFR_SPI_CLK_EN (0x0040) |
101 | #define U300_SYSCON_CEFR_MMC_CLK_EN (0x0020) | 91 | #define U300_SYSCON_CEFR_MMC_CLK_EN (0x0020) |
102 | #define U300_SYSCON_CEFR_I2S1_CLK_EN (0x0010) | 92 | #define U300_SYSCON_CEFR_I2S1_CLK_EN (0x0010) |
103 | #define U300_SYSCON_CEFR_I2S0_CLK_EN (0x0008) | 93 | #define U300_SYSCON_CEFR_I2S0_CLK_EN (0x0008) |
104 | #define U300_SYSCON_CEFR_I2C1_CLK_EN (0x0004) | 94 | #define U300_SYSCON_CEFR_I2C1_CLK_EN (0x0004) |
105 | #define U300_SYSCON_CEFR_I2C0_CLK_EN (0x0002) | 95 | #define U300_SYSCON_CEFR_I2C0_CLK_EN (0x0002) |
106 | #define U300_SYSCON_CEFR_FAST_BRIDGE_CLK_EN (0x0001) | 96 | #define U300_SYSCON_CEFR_FAST_BRIDGE_CLK_EN (0x0001) |
107 | /* Clock enable for the rest of the peripherals 16bit (R/W) */ | 97 | /* Clock enable for the rest of the peripherals 16bit (R/W) */ |
108 | #define U300_SYSCON_CERR (0x0028) | 98 | #define U300_SYSCON_CERR (0x0028) |
109 | #ifdef CONFIG_MACH_U300_BS335 | ||
110 | #define U300_SYSCON_CERR_CDS_CLK_EN (0x2000) | 99 | #define U300_SYSCON_CERR_CDS_CLK_EN (0x2000) |
111 | #define U300_SYSCON_CERR_ISP_CLK_EN (0x1000) | 100 | #define U300_SYSCON_CERR_ISP_CLK_EN (0x1000) |
112 | #endif | ||
113 | #define U300_SYSCON_CERR_MSPRO_CLK_EN (0x0800) | 101 | #define U300_SYSCON_CERR_MSPRO_CLK_EN (0x0800) |
114 | #define U300_SYSCON_CERR_AHB_SUBSYS_BRIDGE_CLK_EN (0x0400) | 102 | #define U300_SYSCON_CERR_AHB_SUBSYS_BRIDGE_CLK_EN (0x0400) |
115 | #define U300_SYSCON_CERR_SEMI_CLK_EN (0x0200) | 103 | #define U300_SYSCON_CERR_SEMI_CLK_EN (0x0200) |
@@ -124,9 +112,7 @@ | |||
124 | #define U300_SYSCON_CERR_AAIF_CLK_EN (0x0001) | 112 | #define U300_SYSCON_CERR_AAIF_CLK_EN (0x0001) |
125 | /* Single block clock enable 16bit (-/W) */ | 113 | /* Single block clock enable 16bit (-/W) */ |
126 | #define U300_SYSCON_SBCER (0x002c) | 114 | #define U300_SYSCON_SBCER (0x002c) |
127 | #ifdef CONFIG_MACH_U300_BS335 | ||
128 | #define U300_SYSCON_SBCER_PPM_CLK_EN (0x0009) | 115 | #define U300_SYSCON_SBCER_PPM_CLK_EN (0x0009) |
129 | #endif | ||
130 | #define U300_SYSCON_SBCER_ACC_TMR_CLK_EN (0x0008) | 116 | #define U300_SYSCON_SBCER_ACC_TMR_CLK_EN (0x0008) |
131 | #define U300_SYSCON_SBCER_APP_TMR_CLK_EN (0x0007) | 117 | #define U300_SYSCON_SBCER_APP_TMR_CLK_EN (0x0007) |
132 | #define U300_SYSCON_SBCER_KEYPAD_CLK_EN (0x0006) | 118 | #define U300_SYSCON_SBCER_KEYPAD_CLK_EN (0x0006) |
@@ -135,9 +121,7 @@ | |||
135 | #define U300_SYSCON_SBCER_BTR_CLK_EN (0x0002) | 121 | #define U300_SYSCON_SBCER_BTR_CLK_EN (0x0002) |
136 | #define U300_SYSCON_SBCER_UART_CLK_EN (0x0001) | 122 | #define U300_SYSCON_SBCER_UART_CLK_EN (0x0001) |
137 | #define U300_SYSCON_SBCER_SLOW_BRIDGE_CLK_EN (0x0000) | 123 | #define U300_SYSCON_SBCER_SLOW_BRIDGE_CLK_EN (0x0000) |
138 | #ifdef CONFIG_MACH_U300_BS335 | ||
139 | #define U300_SYSCON_SBCER_UART1_CLK_EN (0x0019) | 124 | #define U300_SYSCON_SBCER_UART1_CLK_EN (0x0019) |
140 | #endif | ||
141 | #define U300_SYSCON_SBCER_I2S1_CORE_CLK_EN (0x0018) | 125 | #define U300_SYSCON_SBCER_I2S1_CORE_CLK_EN (0x0018) |
142 | #define U300_SYSCON_SBCER_I2S0_CORE_CLK_EN (0x0017) | 126 | #define U300_SYSCON_SBCER_I2S0_CORE_CLK_EN (0x0017) |
143 | #define U300_SYSCON_SBCER_SPI_CLK_EN (0x0016) | 127 | #define U300_SYSCON_SBCER_SPI_CLK_EN (0x0016) |
@@ -147,10 +131,8 @@ | |||
147 | #define U300_SYSCON_SBCER_I2C1_CLK_EN (0x0012) | 131 | #define U300_SYSCON_SBCER_I2C1_CLK_EN (0x0012) |
148 | #define U300_SYSCON_SBCER_I2C0_CLK_EN (0x0011) | 132 | #define U300_SYSCON_SBCER_I2C0_CLK_EN (0x0011) |
149 | #define U300_SYSCON_SBCER_FAST_BRIDGE_CLK_EN (0x0010) | 133 | #define U300_SYSCON_SBCER_FAST_BRIDGE_CLK_EN (0x0010) |
150 | #ifdef CONFIG_MACH_U300_BS335 | ||
151 | #define U300_SYSCON_SBCER_CDS_CLK_EN (0x002D) | 134 | #define U300_SYSCON_SBCER_CDS_CLK_EN (0x002D) |
152 | #define U300_SYSCON_SBCER_ISP_CLK_EN (0x002C) | 135 | #define U300_SYSCON_SBCER_ISP_CLK_EN (0x002C) |
153 | #endif | ||
154 | #define U300_SYSCON_SBCER_MSPRO_CLK_EN (0x002B) | 136 | #define U300_SYSCON_SBCER_MSPRO_CLK_EN (0x002B) |
155 | #define U300_SYSCON_SBCER_AHB_SUBSYS_BRIDGE_CLK_EN (0x002A) | 137 | #define U300_SYSCON_SBCER_AHB_SUBSYS_BRIDGE_CLK_EN (0x002A) |
156 | #define U300_SYSCON_SBCER_SEMI_CLK_EN (0x0029) | 138 | #define U300_SYSCON_SBCER_SEMI_CLK_EN (0x0029) |
@@ -168,9 +150,7 @@ | |||
168 | /* Same values as above for SBCER */ | 150 | /* Same values as above for SBCER */ |
169 | /* Clock force SLOW peripherals 16bit (R/W) */ | 151 | /* Clock force SLOW peripherals 16bit (R/W) */ |
170 | #define U300_SYSCON_CFSR (0x003c) | 152 | #define U300_SYSCON_CFSR (0x003c) |
171 | #ifdef CONFIG_MACH_U300_BS335 | ||
172 | #define U300_SYSCON_CFSR_PPM_CLK_FORCE_EN (0x0200) | 153 | #define U300_SYSCON_CFSR_PPM_CLK_FORCE_EN (0x0200) |
173 | #endif | ||
174 | #define U300_SYSCON_CFSR_ACC_TMR_CLK_FORCE_EN (0x0100) | 154 | #define U300_SYSCON_CFSR_ACC_TMR_CLK_FORCE_EN (0x0100) |
175 | #define U300_SYSCON_CFSR_APP_TMR_CLK_FORCE_EN (0x0080) | 155 | #define U300_SYSCON_CFSR_APP_TMR_CLK_FORCE_EN (0x0080) |
176 | #define U300_SYSCON_CFSR_KEYPAD_CLK_FORCE_EN (0x0020) | 156 | #define U300_SYSCON_CFSR_KEYPAD_CLK_FORCE_EN (0x0020) |
@@ -184,10 +164,8 @@ | |||
184 | /* Values not defined. Define if you want to use them. */ | 164 | /* Values not defined. Define if you want to use them. */ |
185 | /* Clock force the rest of the peripherals 16bit (R/W) */ | 165 | /* Clock force the rest of the peripherals 16bit (R/W) */ |
186 | #define U300_SYSCON_CFRR (0x44) | 166 | #define U300_SYSCON_CFRR (0x44) |
187 | #ifdef CONFIG_MACH_U300_BS335 | ||
188 | #define U300_SYSCON_CFRR_CDS_CLK_FORCE_EN (0x2000) | 167 | #define U300_SYSCON_CFRR_CDS_CLK_FORCE_EN (0x2000) |
189 | #define U300_SYSCON_CFRR_ISP_CLK_FORCE_EN (0x1000) | 168 | #define U300_SYSCON_CFRR_ISP_CLK_FORCE_EN (0x1000) |
190 | #endif | ||
191 | #define U300_SYSCON_CFRR_MSPRO_CLK_FORCE_EN (0x0800) | 169 | #define U300_SYSCON_CFRR_MSPRO_CLK_FORCE_EN (0x0800) |
192 | #define U300_SYSCON_CFRR_AHB_SUBSYS_BRIDGE_CLK_FORCE_EN (0x0400) | 170 | #define U300_SYSCON_CFRR_AHB_SUBSYS_BRIDGE_CLK_FORCE_EN (0x0400) |
193 | #define U300_SYSCON_CFRR_SEMI_CLK_FORCE_EN (0x0200) | 171 | #define U300_SYSCON_CFRR_SEMI_CLK_FORCE_EN (0x0200) |
diff --git a/arch/arm/mach-u300/include/mach/u300-regs.h b/arch/arm/mach-u300/include/mach/u300-regs.h index 65f87c523892..1e49d901f2c9 100644 --- a/arch/arm/mach-u300/include/mach/u300-regs.h +++ b/arch/arm/mach-u300/include/mach/u300-regs.h | |||
@@ -28,7 +28,6 @@ | |||
28 | #define PLAT_NAND_CLE (1 << 16) | 28 | #define PLAT_NAND_CLE (1 << 16) |
29 | #define PLAT_NAND_ALE (1 << 17) | 29 | #define PLAT_NAND_ALE (1 << 17) |
30 | 30 | ||
31 | |||
32 | /* AHB Peripherals */ | 31 | /* AHB Peripherals */ |
33 | #define U300_AHB_PER_PHYS_BASE 0xa0000000 | 32 | #define U300_AHB_PER_PHYS_BASE 0xa0000000 |
34 | #define U300_AHB_PER_VIRT_BASE 0xff010000 | 33 | #define U300_AHB_PER_VIRT_BASE 0xff010000 |
@@ -46,11 +45,7 @@ | |||
46 | #define U300_BOOTROM_VIRT_BASE 0xffff0000 | 45 | #define U300_BOOTROM_VIRT_BASE 0xffff0000 |
47 | 46 | ||
48 | /* SEMI config base */ | 47 | /* SEMI config base */ |
49 | #ifdef CONFIG_MACH_U300_BS335 | ||
50 | #define U300_SEMI_CONFIG_BASE 0x2FFE0000 | 48 | #define U300_SEMI_CONFIG_BASE 0x2FFE0000 |
51 | #else | ||
52 | #define U300_SEMI_CONFIG_BASE 0x30000000 | ||
53 | #endif | ||
54 | 49 | ||
55 | /* | 50 | /* |
56 | * AHB peripherals | 51 | * AHB peripherals |
@@ -99,10 +94,8 @@ | |||
99 | /* SPI controller */ | 94 | /* SPI controller */ |
100 | #define U300_SPI_BASE (U300_FAST_PER_PHYS_BASE+0x6000) | 95 | #define U300_SPI_BASE (U300_FAST_PER_PHYS_BASE+0x6000) |
101 | 96 | ||
102 | #ifdef CONFIG_MACH_U300_BS335 | ||
103 | /* Fast UART1 on U335 only */ | 97 | /* Fast UART1 on U335 only */ |
104 | #define U300_UART1_BASE (U300_SLOW_PER_PHYS_BASE+0x7000) | 98 | #define U300_UART1_BASE (U300_SLOW_PER_PHYS_BASE+0x7000) |
105 | #endif | ||
106 | 99 | ||
107 | /* | 100 | /* |
108 | * SLOW peripherals | 101 | * SLOW peripherals |
@@ -151,10 +144,8 @@ | |||
151 | * REST peripherals | 144 | * REST peripherals |
152 | */ | 145 | */ |
153 | 146 | ||
154 | /* ISP (image signal processor) is only available in U335 */ | 147 | /* ISP (image signal processor) */ |
155 | #ifdef CONFIG_MACH_U300_BS335 | ||
156 | #define U300_ISP_BASE (0xA0008000) | 148 | #define U300_ISP_BASE (0xA0008000) |
157 | #endif | ||
158 | 149 | ||
159 | /* DMA Controller base */ | 150 | /* DMA Controller base */ |
160 | #define U300_DMAC_BASE (0xC0020000) | 151 | #define U300_DMAC_BASE (0xC0020000) |
@@ -166,17 +157,9 @@ | |||
166 | #define U300_APEX_BASE (0xc0030000) | 157 | #define U300_APEX_BASE (0xc0030000) |
167 | 158 | ||
168 | /* Video Encoder Base */ | 159 | /* Video Encoder Base */ |
169 | #ifdef CONFIG_MACH_U300_BS335 | ||
170 | #define U300_VIDEOENC_BASE (0xc0080000) | 160 | #define U300_VIDEOENC_BASE (0xc0080000) |
171 | #else | ||
172 | #define U300_VIDEOENC_BASE (0xc0040000) | ||
173 | #endif | ||
174 | 161 | ||
175 | /* XGAM Base */ | 162 | /* XGAM Base */ |
176 | #define U300_XGAM_BASE (0xd0000000) | 163 | #define U300_XGAM_BASE (0xd0000000) |
177 | 164 | ||
178 | /* | ||
179 | * Virtual accessor macros for static devices | ||
180 | */ | ||
181 | |||
182 | #endif | 165 | #endif |
diff --git a/arch/arm/mach-u300/u300-gpio.h b/arch/arm/mach-u300/u300-gpio.h index 847dc25300c6..83f50772e169 100644 --- a/arch/arm/mach-u300/u300-gpio.h +++ b/arch/arm/mach-u300/u300-gpio.h | |||
@@ -1,50 +1,11 @@ | |||
1 | /* | 1 | /* |
2 | * Individual pin assignments for the B26/S26. Notice that the | 2 | * Individual pin assignments for the B335/S335. |
3 | * actual usage of these pins depends on the PAD MUX settings, that | ||
4 | * is why the same number can potentially appear several times. | ||
5 | * In the reference design each pin is only used for one purpose. | ||
6 | * These were determined by inspecting the B26/S26 schematic: | ||
7 | * 2/1911-ROA 128 1603 | ||
8 | */ | ||
9 | #ifdef CONFIG_MACH_U300_BS2X | ||
10 | #define U300_GPIO_PIN_UART_RX 0 | ||
11 | #define U300_GPIO_PIN_UART_TX 1 | ||
12 | #define U300_GPIO_PIN_GPIO02 2 /* Unrouted */ | ||
13 | #define U300_GPIO_PIN_GPIO03 3 /* Unrouted */ | ||
14 | #define U300_GPIO_PIN_CAM_SLEEP 4 | ||
15 | #define U300_GPIO_PIN_CAM_REG_EN 5 | ||
16 | #define U300_GPIO_PIN_GPIO06 6 /* Unrouted */ | ||
17 | #define U300_GPIO_PIN_GPIO07 7 /* Unrouted */ | ||
18 | |||
19 | #define U300_GPIO_PIN_GPIO08 8 /* Service point SP2321 */ | ||
20 | #define U300_GPIO_PIN_GPIO09 9 /* Service point SP2322 */ | ||
21 | #define U300_GPIO_PIN_PHFSENSE 10 /* Headphone jack sensing */ | ||
22 | #define U300_GPIO_PIN_MMC_CLKRET 11 /* Clock return from MMC/SD card */ | ||
23 | #define U300_GPIO_PIN_MMC_CD 12 /* MMC Card insertion detection */ | ||
24 | #define U300_GPIO_PIN_FLIPSENSE 13 /* Mechanical flip sensing */ | ||
25 | #define U300_GPIO_PIN_GPIO14 14 /* DSP JTAG Port RTCK */ | ||
26 | #define U300_GPIO_PIN_GPIO15 15 /* Unrouted */ | ||
27 | |||
28 | #define U300_GPIO_PIN_GPIO16 16 /* Unrouted */ | ||
29 | #define U300_GPIO_PIN_GPIO17 17 /* Unrouted */ | ||
30 | #define U300_GPIO_PIN_GPIO18 18 /* Unrouted */ | ||
31 | #define U300_GPIO_PIN_GPIO19 19 /* Unrouted */ | ||
32 | #define U300_GPIO_PIN_GPIO20 20 /* Unrouted */ | ||
33 | #define U300_GPIO_PIN_GPIO21 21 /* Unrouted */ | ||
34 | #define U300_GPIO_PIN_GPIO22 22 /* Unrouted */ | ||
35 | #define U300_GPIO_PIN_GPIO23 23 /* Unrouted */ | ||
36 | #endif | ||
37 | |||
38 | /* | ||
39 | * Individual pin assignments for the B330/S330 and B365/S365. | ||
40 | * Notice that the actual usage of these pins depends on the | 3 | * Notice that the actual usage of these pins depends on the |
41 | * PAD MUX settings, that is why the same number can potentially | 4 | * PAD MUX settings, that is why the same number can potentially |
42 | * appear several times. In the reference design each pin is only | 5 | * appear several times. In the reference design each pin is only |
43 | * used for one purpose. These were determined by inspecting the | 6 | * used for one purpose. These were determined by inspecting the |
44 | * S365 schematic. | 7 | * S365 schematic. |
45 | */ | 8 | */ |
46 | #if defined(CONFIG_MACH_U300_BS330) || defined(CONFIG_MACH_U300_BS365) || \ | ||
47 | defined(CONFIG_MACH_U300_BS335) | ||
48 | #define U300_GPIO_PIN_UART_RX 0 | 9 | #define U300_GPIO_PIN_UART_RX 0 |
49 | #define U300_GPIO_PIN_UART_TX 1 | 10 | #define U300_GPIO_PIN_UART_TX 1 |
50 | #define U300_GPIO_PIN_UART_CTS 2 | 11 | #define U300_GPIO_PIN_UART_CTS 2 |
@@ -90,8 +51,6 @@ | |||
90 | #define U300_GPIO_PIN_GPIO38 38 /* Unrouted */ | 51 | #define U300_GPIO_PIN_GPIO38 38 /* Unrouted */ |
91 | #define U300_GPIO_PIN_GPIO39 39 /* Unrouted */ | 52 | #define U300_GPIO_PIN_GPIO39 39 /* Unrouted */ |
92 | 53 | ||
93 | #ifdef CONFIG_MACH_U300_BS335 | ||
94 | |||
95 | #define U300_GPIO_PIN_GPIO40 40 /* Unrouted */ | 54 | #define U300_GPIO_PIN_GPIO40 40 /* Unrouted */ |
96 | #define U300_GPIO_PIN_GPIO41 41 /* Unrouted */ | 55 | #define U300_GPIO_PIN_GPIO41 41 /* Unrouted */ |
97 | #define U300_GPIO_PIN_GPIO42 42 /* Unrouted */ | 56 | #define U300_GPIO_PIN_GPIO42 42 /* Unrouted */ |
@@ -109,6 +68,3 @@ | |||
109 | #define U300_GPIO_PIN_GPIO53 53 /* Unrouted */ | 68 | #define U300_GPIO_PIN_GPIO53 53 /* Unrouted */ |
110 | #define U300_GPIO_PIN_GPIO54 54 /* Unrouted */ | 69 | #define U300_GPIO_PIN_GPIO54 54 /* Unrouted */ |
111 | #define U300_GPIO_PIN_GPIO55 55 /* Unrouted */ | 70 | #define U300_GPIO_PIN_GPIO55 55 /* Unrouted */ |
112 | #endif | ||
113 | |||
114 | #endif | ||
diff --git a/arch/arm/mach-u300/u300.c b/arch/arm/mach-u300/u300.c index f30c69d91d99..4e56e8c093fc 100644 --- a/arch/arm/mach-u300/u300.c +++ b/arch/arm/mach-u300/u300.c | |||
@@ -29,23 +29,7 @@ static void __init u300_init_machine(void) | |||
29 | u300_init_devices(); | 29 | u300_init_devices(); |
30 | } | 30 | } |
31 | 31 | ||
32 | #ifdef CONFIG_MACH_U300_BS2X | 32 | MACHINE_START(U300, "Ericsson AB U335 S335/B335 Prototype Board") |
33 | #define MACH_U300_STRING "Ericsson AB U300 S25/S26/B25/B26 Prototype Board" | ||
34 | #endif | ||
35 | |||
36 | #ifdef CONFIG_MACH_U300_BS330 | ||
37 | #define MACH_U300_STRING "Ericsson AB U330 S330/B330 Prototype Board" | ||
38 | #endif | ||
39 | |||
40 | #ifdef CONFIG_MACH_U300_BS335 | ||
41 | #define MACH_U300_STRING "Ericsson AB U335 S335/B335 Prototype Board" | ||
42 | #endif | ||
43 | |||
44 | #ifdef CONFIG_MACH_U300_BS365 | ||
45 | #define MACH_U300_STRING "Ericsson AB U365 S365/B365 Prototype Board" | ||
46 | #endif | ||
47 | |||
48 | MACHINE_START(U300, MACH_U300_STRING) | ||
49 | /* Maintainer: Linus Walleij <linus.walleij@stericsson.com> */ | 33 | /* Maintainer: Linus Walleij <linus.walleij@stericsson.com> */ |
50 | .atag_offset = 0x100, | 34 | .atag_offset = 0x100, |
51 | .map_io = u300_map_io, | 35 | .map_io = u300_map_io, |