Merge tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC non-critical fixes from Olof Johansson:
 "As usual, we have a batch of fixes that weren't considered significant
  enough to warrant going into the later -rcs for previous release, so
  they are queued up on this branch.

  A handful of these are for various DT fixups for Samsung platforms,
  and a handful of other minor things.

  There are also a couple of stable-marked patches for mvebu -- they
  came in quite late and we decided to keep them deferred until the
  first -stable release to get more coverage instead of squeezing them
  into 3.13"

* tag 'fixes-nc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (32 commits)
  ARM: at91: smc: bug fix in sam9_smc_cs_read()
  i2c: mv64xxx: Document the newly introduced Armada XP A0 compatible
  i2c: mv64xxx: Fix bus hang on A0 version of the Armada XP SoCs
  ARM: mvebu: Add quirk for i2c for the OpenBlocks AX3-4 board
  ARM: mvebu: Add support to get the ID and the revision of a SoC
  ARM: dts: msm: Fix gpio interrupt and reg length
  irqchip: sirf: set IRQ_LEVEL status_flags
  ARM: OMAP2+: gpmc: Move legacy GPMC width setting
  ARM: OMAP2+: gpmc: Introduce gpmc_set_legacy()
  ARM: OMAP2+: gpmc: Move initialization outside the gpmc_t condition
  ARM: OMAP2+: board-generic: update SoC compatibility strings
  Documentation: dt: OMAP: explicitly state SoC compatible strings
  ARM: OMAP2+: enable AM33xx SOC EVM audio
  ARM: OMAP2+: Select USB PHY for AM335x SoC
  ARM: bcm2835: Fix grammar in help message
  ARM: msm: trout: fix uninit var warning
  ARM: dts: Use MSHC controller for eMMC memory for exynos4412-trats2
  ARM: dts: Fix definition of MSHC device tree nodes for exynos4x12
  ARM: dts: add clock provider for mshc node for Exynos4412 SOC
  clk: samsung: exynos4: Fix definition of div_mmc_pre4 divider
  ...

2 files changed, 26 insertions, 16 deletions

diff --git a/arch/arm/mach-u300/regulator.c b/arch/arm/mach-u300/regulator.c
index bf40cd478fe9..0493a845b6bc 100644
--- a/arch/arm/mach-u300/regulator.c
+++ b/arch/arm/mach-u300/regulator.c
@@ -69,9 +69,9 @@ static int __init __u300_init_boardpower(struct platform_device *pdev)
                 return -ENODEV;
         }
         regmap = syscon_node_to_regmap(syscon_np);
-        if (!regmap) {
+        if (IS_ERR(regmap)) {
                 pr_crit("U300: could not locate syscon regmap\n");
-                return -ENODEV;
+                return PTR_ERR(regmap);
         }
 
         main_power_15 = regulator_get(&pdev->dev, "vana15");
diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c
index 9a5f9fb352ce..5226162fac69 100644
--- a/arch/arm/mach-u300/timer.c
+++ b/arch/arm/mach-u300/timer.c
@@ -184,11 +184,13 @@
 #define U300_TIMER_APP_CRC                                      (0x100)
 #define U300_TIMER_APP_CRC_CLOCK_REQUEST_ENABLE                 (0x00000001)
 
-#define TICKS_PER_JIFFY ((CLOCK_TICK_RATE + (HZ/2)) / HZ)
-#define US_PER_TICK ((1000000 + (HZ/2)) / HZ)
-
 static void __iomem *u300_timer_base;
 
+struct u300_clockevent_data {
+        struct clock_event_device cevd;
+        unsigned ticks_per_jiffy;
+};
+
 /*
  * The u300_set_mode() function is always called first, if we
  * have oneshot timer active, the oneshot scheduling function
@@ -197,6 +199,9 @@ static void __iomem *u300_timer_base;
 static void u300_set_mode(enum clock_event_mode mode,
                           struct clock_event_device *evt)
 {
+        struct u300_clockevent_data *cevdata =
+                container_of(evt, struct u300_clockevent_data, cevd);
+
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
                 /* Disable interrupts on GPT1 */
@@ -209,7 +214,7 @@ static void u300_set_mode(enum clock_event_mode mode,
                  * Set the periodic mode to a certain number of ticks per
                  * jiffy.
                  */
-                writel(TICKS_PER_JIFFY,
+                writel(cevdata->ticks_per_jiffy,
                        u300_timer_base + U300_TIMER_APP_GPT1TC);
                 /*
                  * Set continuous mode, so the timer keeps triggering
@@ -305,20 +310,23 @@ static int u300_set_next_event(unsigned long cycles,
         return 0;
 }
 
-
-/* Use general purpose timer 1 as clock event */
-static struct clock_event_device clockevent_u300_1mhz = {
-        .name           = "GPT1",
-        .rating         = 300, /* Reasonably fast and accurate clock event */
-        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-        .set_next_event = u300_set_next_event,
-        .set_mode       = u300_set_mode,
+static struct u300_clockevent_data u300_clockevent_data = {
+        /* Use general purpose timer 1 as clock event */
+        .cevd = {
+                .name           = "GPT1",
+                /* Reasonably fast and accurate clock event */
+                .rating         = 300,
+                .features       = CLOCK_EVT_FEAT_PERIODIC |
+                        CLOCK_EVT_FEAT_ONESHOT,
+                .set_next_event = u300_set_next_event,
+                .set_mode       = u300_set_mode,
+        },
 };
 
 /* Clock event timer interrupt handler */
 static irqreturn_t u300_timer_interrupt(int irq, void *dev_id)
 {
-        struct clock_event_device *evt = &clockevent_u300_1mhz;
+        struct clock_event_device *evt = &u300_clockevent_data.cevd;
         /* ACK/Clear timer IRQ for the APP GPT1 Timer */
 
         writel(U300_TIMER_APP_GPT1IA_IRQ_ACK,
@@ -379,6 +387,8 @@ static void __init u300_timer_init_of(struct device_node *np)
         clk_prepare_enable(clk);
         rate = clk_get_rate(clk);
 
+        u300_clockevent_data.ticks_per_jiffy = DIV_ROUND_CLOSEST(rate, HZ);
+
         setup_sched_clock(u300_read_sched_clock, 32, rate);
 
         u300_delay_timer.read_current_timer = &u300_read_current_timer;
@@ -428,7 +438,7 @@ static void __init u300_timer_init_of(struct device_node *np)
                 pr_err("timer: failed to initialize U300 clock source\n");
 
         /* Configure and register the clockevent */
-        clockevents_config_and_register(&clockevent_u300_1mhz, rate,
+        clockevents_config_and_register(&u300_clockevent_data.cevd, rate,
                                         1, 0xffffffff);
 
         /*