diff options
author | Joe Perches <joe@perches.com> | 2014-09-13 14:31:19 -0400 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2014-10-28 05:47:04 -0400 |
commit | 2197eb81e368b73d58961207b3914136921eda84 (patch) | |
tree | 5560d2a0c66bff83ddfb90aaf959eb52e9a016bb /arch/arm/mach-u300 | |
parent | cac7f2429872d3733dc3f9915857b1691da2eb2f (diff) |
ARM: u300: Convert pr_warning to pr_warn
Use the more common pr_warn.
Other miscellanea:
o Coalesce formats
o Realign arguments
o typo fixes of Siple to Simple
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-u300')
-rw-r--r-- | arch/arm/mach-u300/dummyspichip.c | 65 |
1 files changed, 29 insertions, 36 deletions
diff --git a/arch/arm/mach-u300/dummyspichip.c b/arch/arm/mach-u300/dummyspichip.c index ec0283cf9a32..131996805690 100644 --- a/arch/arm/mach-u300/dummyspichip.c +++ b/arch/arm/mach-u300/dummyspichip.c | |||
@@ -80,8 +80,8 @@ static ssize_t dummy_looptest(struct device *dev, | |||
80 | "in 8bit mode\n"); | 80 | "in 8bit mode\n"); |
81 | status = spi_w8r8(spi, 0xAA); | 81 | status = spi_w8r8(spi, 0xAA); |
82 | if (status < 0) | 82 | if (status < 0) |
83 | pr_warning("Siple test 1: FAILURE: spi_write_then_read " | 83 | pr_warn("Simple test 1: FAILURE: spi_write_then_read failed with status %d\n", |
84 | "failed with status %d\n", status); | 84 | status); |
85 | else | 85 | else |
86 | pr_info("Simple test 1: SUCCESS!\n"); | 86 | pr_info("Simple test 1: SUCCESS!\n"); |
87 | 87 | ||
@@ -89,8 +89,8 @@ static ssize_t dummy_looptest(struct device *dev, | |||
89 | "in 8bit mode (full FIFO)\n"); | 89 | "in 8bit mode (full FIFO)\n"); |
90 | status = spi_write_then_read(spi, &txbuf[0], 8, &rxbuf[0], 8); | 90 | status = spi_write_then_read(spi, &txbuf[0], 8, &rxbuf[0], 8); |
91 | if (status < 0) | 91 | if (status < 0) |
92 | pr_warning("Simple test 2: FAILURE: spi_write_then_read() " | 92 | pr_warn("Simple test 2: FAILURE: spi_write_then_read() failed with status %d\n", |
93 | "failed with status %d\n", status); | 93 | status); |
94 | else | 94 | else |
95 | pr_info("Simple test 2: SUCCESS!\n"); | 95 | pr_info("Simple test 2: SUCCESS!\n"); |
96 | 96 | ||
@@ -98,8 +98,8 @@ static ssize_t dummy_looptest(struct device *dev, | |||
98 | "in 8bit mode (see if we overflow FIFO)\n"); | 98 | "in 8bit mode (see if we overflow FIFO)\n"); |
99 | status = spi_write_then_read(spi, &txbuf[0], 14, &rxbuf[0], 14); | 99 | status = spi_write_then_read(spi, &txbuf[0], 14, &rxbuf[0], 14); |
100 | if (status < 0) | 100 | if (status < 0) |
101 | pr_warning("Simple test 3: FAILURE: failed with status %d " | 101 | pr_warn("Simple test 3: FAILURE: failed with status %d (probably FIFO overrun)\n", |
102 | "(probably FIFO overrun)\n", status); | 102 | status); |
103 | else | 103 | else |
104 | pr_info("Simple test 3: SUCCESS!\n"); | 104 | pr_info("Simple test 3: SUCCESS!\n"); |
105 | 105 | ||
@@ -107,14 +107,14 @@ static ssize_t dummy_looptest(struct device *dev, | |||
107 | "bytes garbage with spi_read() in 8bit mode\n"); | 107 | "bytes garbage with spi_read() in 8bit mode\n"); |
108 | status = spi_write(spi, &txbuf[0], 8); | 108 | status = spi_write(spi, &txbuf[0], 8); |
109 | if (status < 0) | 109 | if (status < 0) |
110 | pr_warning("Simple test 4 step 1: FAILURE: spi_write() " | 110 | pr_warn("Simple test 4 step 1: FAILURE: spi_write() failed with status %d\n", |
111 | "failed with status %d\n", status); | 111 | status); |
112 | else | 112 | else |
113 | pr_info("Simple test 4 step 1: SUCCESS!\n"); | 113 | pr_info("Simple test 4 step 1: SUCCESS!\n"); |
114 | status = spi_read(spi, &rxbuf[0], 8); | 114 | status = spi_read(spi, &rxbuf[0], 8); |
115 | if (status < 0) | 115 | if (status < 0) |
116 | pr_warning("Simple test 4 step 2: FAILURE: spi_read() " | 116 | pr_warn("Simple test 4 step 2: FAILURE: spi_read() failed with status %d\n", |
117 | "failed with status %d\n", status); | 117 | status); |
118 | else | 118 | else |
119 | pr_info("Simple test 4 step 2: SUCCESS!\n"); | 119 | pr_info("Simple test 4 step 2: SUCCESS!\n"); |
120 | 120 | ||
@@ -122,16 +122,14 @@ static ssize_t dummy_looptest(struct device *dev, | |||
122 | "14 bytes garbage with spi_read() in 8bit mode\n"); | 122 | "14 bytes garbage with spi_read() in 8bit mode\n"); |
123 | status = spi_write(spi, &txbuf[0], 14); | 123 | status = spi_write(spi, &txbuf[0], 14); |
124 | if (status < 0) | 124 | if (status < 0) |
125 | pr_warning("Simple test 5 step 1: FAILURE: spi_write() " | 125 | pr_warn("Simple test 5 step 1: FAILURE: spi_write() failed with status %d (probably FIFO overrun)\n", |
126 | "failed with status %d (probably FIFO overrun)\n", | 126 | status); |
127 | status); | ||
128 | else | 127 | else |
129 | pr_info("Simple test 5 step 1: SUCCESS!\n"); | 128 | pr_info("Simple test 5 step 1: SUCCESS!\n"); |
130 | status = spi_read(spi, &rxbuf[0], 14); | 129 | status = spi_read(spi, &rxbuf[0], 14); |
131 | if (status < 0) | 130 | if (status < 0) |
132 | pr_warning("Simple test 5 step 2: FAILURE: spi_read() " | 131 | pr_warn("Simple test 5 step 2: FAILURE: spi_read() failed with status %d (probably FIFO overrun)\n", |
133 | "failed with status %d (probably FIFO overrun)\n", | 132 | status); |
134 | status); | ||
135 | else | 133 | else |
136 | pr_info("Simple test 5: SUCCESS!\n"); | 134 | pr_info("Simple test 5: SUCCESS!\n"); |
137 | 135 | ||
@@ -140,16 +138,14 @@ static ssize_t dummy_looptest(struct device *dev, | |||
140 | DMA_TEST_SIZE, DMA_TEST_SIZE); | 138 | DMA_TEST_SIZE, DMA_TEST_SIZE); |
141 | status = spi_write(spi, &bigtxbuf_virtual[0], DMA_TEST_SIZE); | 139 | status = spi_write(spi, &bigtxbuf_virtual[0], DMA_TEST_SIZE); |
142 | if (status < 0) | 140 | if (status < 0) |
143 | pr_warning("Simple test 6 step 1: FAILURE: spi_write() " | 141 | pr_warn("Simple test 6 step 1: FAILURE: spi_write() failed with status %d (probably FIFO overrun)\n", |
144 | "failed with status %d (probably FIFO overrun)\n", | 142 | status); |
145 | status); | ||
146 | else | 143 | else |
147 | pr_info("Simple test 6 step 1: SUCCESS!\n"); | 144 | pr_info("Simple test 6 step 1: SUCCESS!\n"); |
148 | status = spi_read(spi, &bigrxbuf_virtual[0], DMA_TEST_SIZE); | 145 | status = spi_read(spi, &bigrxbuf_virtual[0], DMA_TEST_SIZE); |
149 | if (status < 0) | 146 | if (status < 0) |
150 | pr_warning("Simple test 6 step 2: FAILURE: spi_read() " | 147 | pr_warn("Simple test 6 step 2: FAILURE: spi_read() failed with status %d (probably FIFO overrun)\n", |
151 | "failed with status %d (probably FIFO overrun)\n", | 148 | status); |
152 | status); | ||
153 | else | 149 | else |
154 | pr_info("Simple test 6: SUCCESS!\n"); | 150 | pr_info("Simple test 6: SUCCESS!\n"); |
155 | 151 | ||
@@ -169,18 +165,17 @@ static ssize_t dummy_looptest(struct device *dev, | |||
169 | pr_info("Simple test 7: SUCCESS! (expected failure with " | 165 | pr_info("Simple test 7: SUCCESS! (expected failure with " |
170 | "status EIO)\n"); | 166 | "status EIO)\n"); |
171 | else if (status < 0) | 167 | else if (status < 0) |
172 | pr_warning("Siple test 7: FAILURE: spi_write_then_read " | 168 | pr_warn("Simple test 7: FAILURE: spi_write_then_read failed with status %d\n", |
173 | "failed with status %d\n", status); | 169 | status); |
174 | else | 170 | else |
175 | pr_warning("Siple test 7: FAILURE: spi_write_then_read " | 171 | pr_warn("Simple test 7: FAILURE: spi_write_then_read succeeded but it was expected to fail!\n"); |
176 | "succeeded but it was expected to fail!\n"); | ||
177 | 172 | ||
178 | pr_info("Simple test 8: write 8 bytes, read back 8 bytes garbage " | 173 | pr_info("Simple test 8: write 8 bytes, read back 8 bytes garbage " |
179 | "in 16bit mode (full FIFO)\n"); | 174 | "in 16bit mode (full FIFO)\n"); |
180 | status = spi_write_then_read(spi, &txbuf[0], 8, &rxbuf[0], 8); | 175 | status = spi_write_then_read(spi, &txbuf[0], 8, &rxbuf[0], 8); |
181 | if (status < 0) | 176 | if (status < 0) |
182 | pr_warning("Simple test 8: FAILURE: spi_write_then_read() " | 177 | pr_warn("Simple test 8: FAILURE: spi_write_then_read() failed with status %d\n", |
183 | "failed with status %d\n", status); | 178 | status); |
184 | else | 179 | else |
185 | pr_info("Simple test 8: SUCCESS!\n"); | 180 | pr_info("Simple test 8: SUCCESS!\n"); |
186 | 181 | ||
@@ -188,8 +183,8 @@ static ssize_t dummy_looptest(struct device *dev, | |||
188 | "in 16bit mode (see if we overflow FIFO)\n"); | 183 | "in 16bit mode (see if we overflow FIFO)\n"); |
189 | status = spi_write_then_read(spi, &txbuf[0], 14, &rxbuf[0], 14); | 184 | status = spi_write_then_read(spi, &txbuf[0], 14, &rxbuf[0], 14); |
190 | if (status < 0) | 185 | if (status < 0) |
191 | pr_warning("Simple test 9: FAILURE: failed with status %d " | 186 | pr_warn("Simple test 9: FAILURE: failed with status %d (probably FIFO overrun)\n", |
192 | "(probably FIFO overrun)\n", status); | 187 | status); |
193 | else | 188 | else |
194 | pr_info("Simple test 9: SUCCESS!\n"); | 189 | pr_info("Simple test 9: SUCCESS!\n"); |
195 | 190 | ||
@@ -198,17 +193,15 @@ static ssize_t dummy_looptest(struct device *dev, | |||
198 | DMA_TEST_SIZE, DMA_TEST_SIZE); | 193 | DMA_TEST_SIZE, DMA_TEST_SIZE); |
199 | status = spi_write(spi, &bigtxbuf_virtual[0], DMA_TEST_SIZE); | 194 | status = spi_write(spi, &bigtxbuf_virtual[0], DMA_TEST_SIZE); |
200 | if (status < 0) | 195 | if (status < 0) |
201 | pr_warning("Simple test 10 step 1: FAILURE: spi_write() " | 196 | pr_warn("Simple test 10 step 1: FAILURE: spi_write() failed with status %d (probably FIFO overrun)\n", |
202 | "failed with status %d (probably FIFO overrun)\n", | 197 | status); |
203 | status); | ||
204 | else | 198 | else |
205 | pr_info("Simple test 10 step 1: SUCCESS!\n"); | 199 | pr_info("Simple test 10 step 1: SUCCESS!\n"); |
206 | 200 | ||
207 | status = spi_read(spi, &bigrxbuf_virtual[0], DMA_TEST_SIZE); | 201 | status = spi_read(spi, &bigrxbuf_virtual[0], DMA_TEST_SIZE); |
208 | if (status < 0) | 202 | if (status < 0) |
209 | pr_warning("Simple test 10 step 2: FAILURE: spi_read() " | 203 | pr_warn("Simple test 10 step 2: FAILURE: spi_read() failed with status %d (probably FIFO overrun)\n", |
210 | "failed with status %d (probably FIFO overrun)\n", | 204 | status); |
211 | status); | ||
212 | else | 205 | else |
213 | pr_info("Simple test 10: SUCCESS!\n"); | 206 | pr_info("Simple test 10: SUCCESS!\n"); |
214 | 207 | ||