diff options
author | Linus Walleij <linus.walleij@stericsson.com> | 2010-08-05 02:59:54 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-08-10 17:10:56 -0400 |
commit | 3af8a8dad07527b25055b8b4c2a2b0d69362e7fb (patch) | |
tree | 1c2847dcddbeed9217c1fee8b92b16758426bb63 /arch/arm/mach-u300/timer.c | |
parent | b7276b236dcf400003179e77f5b4b4c05e1fb29c (diff) |
ARM: 6297/1: move U300 timer to dynamic clock lookup
This moves the U300 timer code to look up its clock rate from the
clock framework as is apropriate and also switches it over to use
the generic code for *calc_mult_shift() on clock source and clock
event.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-u300/timer.c')
-rw-r--r-- | arch/arm/mach-u300/timer.c | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c index 01f161831956..3fc4472719be 100644 --- a/arch/arm/mach-u300/timer.c +++ b/arch/arm/mach-u300/timer.c | |||
@@ -25,6 +25,8 @@ | |||
25 | #include <asm/mach/time.h> | 25 | #include <asm/mach/time.h> |
26 | #include <asm/mach/irq.h> | 26 | #include <asm/mach/irq.h> |
27 | 27 | ||
28 | /* Be able to sleep for atleast 4 seconds (usually more) */ | ||
29 | #define APPTIMER_MIN_RANGE 4 | ||
28 | 30 | ||
29 | /* | 31 | /* |
30 | * APP side special timer registers | 32 | * APP side special timer registers |
@@ -308,8 +310,6 @@ static struct clock_event_device clockevent_u300_1mhz = { | |||
308 | .name = "GPT1", | 310 | .name = "GPT1", |
309 | .rating = 300, /* Reasonably fast and accurate clock event */ | 311 | .rating = 300, /* Reasonably fast and accurate clock event */ |
310 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | 312 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
311 | /* 22 calculated using the algorithm in arch/mips/kernel/time.c */ | ||
312 | .shift = 22, | ||
313 | .set_next_event = u300_set_next_event, | 313 | .set_next_event = u300_set_next_event, |
314 | .set_mode = u300_set_mode, | 314 | .set_mode = u300_set_mode, |
315 | }; | 315 | }; |
@@ -342,8 +342,6 @@ static struct clocksource clocksource_u300_1mhz = { | |||
342 | .rating = 300, /* Reasonably fast and accurate clock source */ | 342 | .rating = 300, /* Reasonably fast and accurate clock source */ |
343 | .read = u300_get_cycles, | 343 | .read = u300_get_cycles, |
344 | .mask = CLOCKSOURCE_MASK(32), /* 32 bits */ | 344 | .mask = CLOCKSOURCE_MASK(32), /* 32 bits */ |
345 | /* 22 calculated using the algorithm in arch/mips/kernel/time.c */ | ||
346 | .shift = 22, | ||
347 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 345 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
348 | }; | 346 | }; |
349 | 347 | ||
@@ -369,11 +367,13 @@ unsigned long long notrace sched_clock(void) | |||
369 | static void __init u300_timer_init(void) | 367 | static void __init u300_timer_init(void) |
370 | { | 368 | { |
371 | struct clk *clk; | 369 | struct clk *clk; |
370 | unsigned long rate; | ||
372 | 371 | ||
373 | /* Clock the interrupt controller */ | 372 | /* Clock the interrupt controller */ |
374 | clk = clk_get_sys("apptimer", NULL); | 373 | clk = clk_get_sys("apptimer", NULL); |
375 | BUG_ON(IS_ERR(clk)); | 374 | BUG_ON(IS_ERR(clk)); |
376 | clk_enable(clk); | 375 | clk_enable(clk); |
376 | rate = clk_get_rate(clk); | ||
377 | 377 | ||
378 | /* | 378 | /* |
379 | * Disable the "OS" and "DD" timers - these are designed for Symbian! | 379 | * Disable the "OS" and "DD" timers - these are designed for Symbian! |
@@ -412,15 +412,14 @@ static void __init u300_timer_init(void) | |||
412 | writel(U300_TIMER_APP_EGPT2_TIMER_ENABLE, | 412 | writel(U300_TIMER_APP_EGPT2_TIMER_ENABLE, |
413 | U300_TIMER_APP_VBASE + U300_TIMER_APP_EGPT2); | 413 | U300_TIMER_APP_VBASE + U300_TIMER_APP_EGPT2); |
414 | 414 | ||
415 | /* This is a pure microsecond clock source */ | 415 | clocksource_calc_mult_shift(&clocksource_u300_1mhz, |
416 | clocksource_u300_1mhz.mult = | 416 | rate, APPTIMER_MIN_RANGE); |
417 | clocksource_khz2mult(1000, clocksource_u300_1mhz.shift); | ||
418 | if (clocksource_register(&clocksource_u300_1mhz)) | 417 | if (clocksource_register(&clocksource_u300_1mhz)) |
419 | printk(KERN_ERR "timer: failed to initialize clock " | 418 | printk(KERN_ERR "timer: failed to initialize clock " |
420 | "source %s\n", clocksource_u300_1mhz.name); | 419 | "source %s\n", clocksource_u300_1mhz.name); |
421 | 420 | ||
422 | clockevent_u300_1mhz.mult = | 421 | clockevents_calc_mult_shift(&clockevent_u300_1mhz, |
423 | div_sc(1000000, NSEC_PER_SEC, clockevent_u300_1mhz.shift); | 422 | rate, APPTIMER_MIN_RANGE); |
424 | /* 32bit counter, so 32bits delta is max */ | 423 | /* 32bit counter, so 32bits delta is max */ |
425 | clockevent_u300_1mhz.max_delta_ns = | 424 | clockevent_u300_1mhz.max_delta_ns = |
426 | clockevent_delta2ns(0xffffffff, &clockevent_u300_1mhz); | 425 | clockevent_delta2ns(0xffffffff, &clockevent_u300_1mhz); |