Merge branch 'next/cleanup' of git://git.linaro.org/people/arnd/arm-soc

* 'next/cleanup' of git://git.linaro.org/people/arnd/arm-soc: (125 commits)
  ARM: mach-mxs: fix machines' initializers order
  mmc: mxcmmc: explicitly includes mach/hardware.h
  arm/imx: explicitly includes mach/hardware.h in pm-imx27.c
  arm/imx: remove mx27_setup_weimcs() from mx27.h
  arm/imx: explicitly includes mach/hardware.h in mach-kzm_arm11_01.c
  arm/imx: remove mx31_setup_weimcs() from mx31.h
  ARM: tegra: devices.c should include devices.h
  ARM: tegra: cpu-tegra: unexport two functions
  ARM: tegra: cpu-tegra: sparse type fix
  ARM: tegra: dma: staticify some tables and functions
  ARM: tegra: tegra2_clocks: don't export some tables
  ARM: tegra: tegra_powergate_is_powered should be static
  ARM: tegra: tegra_rtc_read_ms should be static
  ARM: tegra: tegra_init_cache should be static
  ARM: tegra: pcie: 0 -> NULL changes
  ARM: tegra: pcie: include board.h
  ARM: tegra: pcie: don't cast __iomem pointers
  ARM: tegra: tegra2_clocks: 0 -> NULL changes
  ARM: tegra: tegra2_clocks: don't cast __iomem pointers
  ARM: tegra: timer: don't cast __iomem pointers
  ...

Fix up trivial conflicts in
  arch/arm/mach-omap2/Makefile,
  arch/arm/mach-u300/{Makefile.boot,core.c}
  arch/arm/plat-{mxc,omap}/devices.c

11 files changed, 66 insertions, 54 deletions

diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index d5e3f89b05af..690b888be506 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -61,7 +61,7 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = {
         { NULL,         NULL,           0,              0},
 };
 
-void __init tegra_init_cache(void)
+static void __init tegra_init_cache(void)
 {
 #ifdef CONFIG_CACHE_L2X0
         void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
diff --git a/arch/arm/mach-tegra/cpu-tegra.c b/arch/arm/mach-tegra/cpu-tegra.c
index 0e0fd4d889bd..bb5ce39b733b 100644
--- a/arch/arm/mach-tegra/cpu-tegra.c
+++ b/arch/arm/mach-tegra/cpu-tegra.c
@@ -56,12 +56,12 @@ static unsigned long target_cpu_speed[NUM_CPUS];
 static DEFINE_MUTEX(tegra_cpu_lock);
 static bool is_suspended;
 
-int tegra_verify_speed(struct cpufreq_policy *policy)
+static int tegra_verify_speed(struct cpufreq_policy *policy)
 {
         return cpufreq_frequency_table_verify(policy, freq_table);
 }
 
-unsigned int tegra_getspeed(unsigned int cpu)
+static unsigned int tegra_getspeed(unsigned int cpu)
 {
         unsigned long rate;
 
@@ -129,7 +129,7 @@ static int tegra_target(struct cpufreq_policy *policy,
                        unsigned int target_freq,
                        unsigned int relation)
 {
-        int idx;
+        unsigned int idx;
         unsigned int freq;
         int ret = 0;
 
diff --git a/arch/arm/mach-tegra/devices.c b/arch/arm/mach-tegra/devices.c
index 57e35d20c24c..489e82b5282a 100644
--- a/arch/arm/mach-tegra/devices.c
+++ b/arch/arm/mach-tegra/devices.c
@@ -29,7 +29,9 @@
 #include <mach/iomap.h>
 #include <mach/dma.h>
 #include <mach/usb_phy.h>
+
 #include "gpio-names.h"
+#include "devices.h"
 
 static struct resource i2c_resource1[] = {
         [0] = {
diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c
index f4ef5eb317bd..c0cf967e47d3 100644
--- a/arch/arm/mach-tegra/dma.c
+++ b/arch/arm/mach-tegra/dma.c
@@ -105,13 +105,17 @@
 
 #define NV_DMA_MAX_TRASFER_SIZE 0x10000
 
-const unsigned int ahb_addr_wrap_table[8] = {
+static const unsigned int ahb_addr_wrap_table[8] = {
         0, 32, 64, 128, 256, 512, 1024, 2048
 };
 
-const unsigned int apb_addr_wrap_table[8] = {0, 1, 2, 4, 8, 16, 32, 64};
+static const unsigned int apb_addr_wrap_table[8] = {
+        0, 1, 2, 4, 8, 16, 32, 64
+};
 
-const unsigned int bus_width_table[5] = {8, 16, 32, 64, 128};
+static const unsigned int bus_width_table[5] = {
+        8, 16, 32, 64, 128
+};
 
 #define TEGRA_DMA_NAME_SIZE 16
 struct tegra_dma_channel {
@@ -157,7 +161,7 @@ void tegra_dma_dequeue(struct tegra_dma_channel *ch)
         return;
 }
 
-void tegra_dma_stop(struct tegra_dma_channel *ch)
+static void tegra_dma_stop(struct tegra_dma_channel *ch)
 {
         u32 csr;
         u32 status;
@@ -174,7 +178,7 @@ void tegra_dma_stop(struct tegra_dma_channel *ch)
                 writel(status, ch->addr + APB_DMA_CHAN_STA);
 }
 
-int tegra_dma_cancel(struct tegra_dma_channel *ch)
+static int tegra_dma_cancel(struct tegra_dma_channel *ch)
 {
         u32 csr;
         unsigned long irq_flags;
diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h
index 4cea2230c8dc..35a011fbc42d 100644
--- a/arch/arm/mach-tegra/include/mach/io.h
+++ b/arch/arm/mach-tegra/include/mach/io.h
@@ -33,20 +33,26 @@
  *
  */
 
+#ifdef __ASSEMBLY__
+#define IOMEM(x)        (x)
+#else
+#define IOMEM(x)        ((void __force __iomem *)(x))
+#endif
+
 #define IO_IRAM_PHYS    0x40000000
-#define IO_IRAM_VIRT    0xFE400000
+#define IO_IRAM_VIRT    IOMEM(0xFE400000)
 #define IO_IRAM_SIZE    SZ_256K
 
 #define IO_CPU_PHYS     0x50040000
-#define IO_CPU_VIRT     0xFE000000
+#define IO_CPU_VIRT     IOMEM(0xFE000000)
 #define IO_CPU_SIZE     SZ_16K
 
 #define IO_PPSB_PHYS    0x60000000
-#define IO_PPSB_VIRT    0xFE200000
+#define IO_PPSB_VIRT    IOMEM(0xFE200000)
 #define IO_PPSB_SIZE    SZ_1M
 
 #define IO_APB_PHYS     0x70000000
-#define IO_APB_VIRT     0xFE300000
+#define IO_APB_VIRT     IOMEM(0xFE300000)
 #define IO_APB_SIZE     SZ_1M
 
 #define IO_TO_VIRT_BETWEEN(p, st, sz)   ((p) >= (st) && (p) < ((st) + (sz)))
@@ -61,7 +67,7 @@
                 IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) :       \
         IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ?           \
                 IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) :     \
-        0)
+        NULL)
 
 #ifndef __ASSEMBLER__
 
@@ -71,7 +77,7 @@
 void __iomem *tegra_ioremap(unsigned long phys, size_t size, unsigned int type);
 void tegra_iounmap(volatile void __iomem *addr);
 
-#define IO_ADDRESS(n) ((void __iomem *) IO_TO_VIRT(n))
+#define IO_ADDRESS(n) (IO_TO_VIRT(n))
 
 #ifdef CONFIG_TEGRA_PCI
 extern void __iomem *tegra_pcie_io_base;
diff --git a/arch/arm/mach-tegra/include/mach/powergate.h b/arch/arm/mach-tegra/include/mach/powergate.h
index 401d1b725291..39c396d2ddb0 100644
--- a/arch/arm/mach-tegra/include/mach/powergate.h
+++ b/arch/arm/mach-tegra/include/mach/powergate.h
@@ -31,7 +31,6 @@
 
 int tegra_powergate_power_on(int id);
 int tegra_powergate_power_off(int id);
-bool tegra_powergate_is_powered(int id);
 int tegra_powergate_remove_clamping(int id);
 
 /* Must be called with clk disabled, and returns with clk enabled */
diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c
index ea50fe28cf6a..5489f8b5d6ad 100644
--- a/arch/arm/mach-tegra/io.c
+++ b/arch/arm/mach-tegra/io.c
@@ -31,25 +31,25 @@
 
 static struct map_desc tegra_io_desc[] __initdata = {
         {
-                .virtual = IO_PPSB_VIRT,
+                .virtual = (unsigned long)IO_PPSB_VIRT,
                 .pfn = __phys_to_pfn(IO_PPSB_PHYS),
                 .length = IO_PPSB_SIZE,
                 .type = MT_DEVICE,
         },
         {
-                .virtual = IO_APB_VIRT,
+                .virtual = (unsigned long)IO_APB_VIRT,
                 .pfn = __phys_to_pfn(IO_APB_PHYS),
                 .length = IO_APB_SIZE,
                 .type = MT_DEVICE,
         },
         {
-                .virtual = IO_CPU_VIRT,
+                .virtual = (unsigned long)IO_CPU_VIRT,
                 .pfn = __phys_to_pfn(IO_CPU_PHYS),
                 .length = IO_CPU_SIZE,
                 .type = MT_DEVICE,
         },
         {
-                .virtual = IO_IRAM_VIRT,
+                .virtual = (unsigned long)IO_IRAM_VIRT,
                 .pfn = __phys_to_pfn(IO_IRAM_PHYS),
                 .length = IO_IRAM_SIZE,
                 .type = MT_DEVICE,
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index f1f699d86c32..f5aa173c26b3 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -41,6 +41,8 @@
 #include <mach/clk.h>
 #include <mach/powergate.h>
 
+#include "board.h"
+
 /* register definitions */
 #define AFI_OFFSET      0x3800
 #define PADS_OFFSET     0x3000
@@ -150,9 +152,9 @@
 static void __iomem *reg_pmc_base = IO_ADDRESS(TEGRA_PMC_BASE);
 
 #define pmc_writel(value, reg) \
-        __raw_writel(value, (u32)reg_pmc_base + (reg))
+        __raw_writel(value, reg_pmc_base + (reg))
 #define pmc_readl(reg) \
-        __raw_readl((u32)reg_pmc_base + (reg))
+        __raw_readl(reg_pmc_base + (reg))
 
 /*
  * Tegra2 defines 1GB in the AXI address map for PCIe.
@@ -460,7 +462,7 @@ static struct pci_bus __init *tegra_pcie_scan_bus(int nr,
         struct tegra_pcie_port *pp;
 
         if (nr >= tegra_pcie.num_ports)
-                return 0;
+                return NULL;
 
         pp = tegra_pcie.port + nr;
         pp->root_bus_nr = sys->busnr;
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index 3cee9aa1f2c8..948306491a59 100644
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -89,12 +89,11 @@ int tegra_powergate_power_off(int id)
         return tegra_powergate_set(id, false);
 }
 
-bool tegra_powergate_is_powered(int id)
+static bool tegra_powergate_is_powered(int id)
 {
         u32 status;
 
-        if (id < 0 || id >= TEGRA_NUM_POWERGATE)
-                return -EINVAL;
+        WARN_ON(id < 0 || id >= TEGRA_NUM_POWERGATE);
 
         status = pmc_read(PWRGATE_STATUS) & (1 << id);
         return !!status;
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index 0fe9b3ee2947..371869d8ea01 100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -166,13 +166,13 @@ static DEFINE_SPINLOCK(clock_register_lock);
 static int tegra_periph_clk_enable_refcount[3 * 32];
 
 #define clk_writel(value, reg) \
-        __raw_writel(value, (u32)reg_clk_base + (reg))
+        __raw_writel(value, reg_clk_base + (reg))
 #define clk_readl(reg) \
-        __raw_readl((u32)reg_clk_base + (reg))
+        __raw_readl(reg_clk_base + (reg))
 #define pmc_writel(value, reg) \
-        __raw_writel(value, (u32)reg_pmc_base + (reg))
+        __raw_writel(value, reg_pmc_base + (reg))
 #define pmc_readl(reg) \
-        __raw_readl((u32)reg_pmc_base + (reg))
+        __raw_readl(reg_pmc_base + (reg))
 
 unsigned long clk_measure_input_freq(void)
 {
@@ -918,7 +918,7 @@ static struct clk_ops tegra_pll_div_ops = {
 static void tegra2_periph_clk_init(struct clk *c)
 {
         u32 val = clk_readl(c->reg);
-        const struct clk_mux_sel *mux = 0;
+        const struct clk_mux_sel *mux = NULL;
         const struct clk_mux_sel *sel;
         if (c->flags & MUX) {
                 for (sel = c->inputs; sel->input != NULL; sel++) {
@@ -1459,7 +1459,7 @@ static struct clk tegra_pll_s = {
 static struct clk_mux_sel tegra_clk_m_sel[] = {
         { .input = &tegra_clk_32k, .value = 0},
         { .input = &tegra_pll_s,  .value = 1},
-        { 0, 0},
+        { NULL , 0},
 };
 
 static struct clk tegra_clk_m = {
@@ -1861,7 +1861,7 @@ static const struct audio_sources {
         { .name = "ext_audio_clk1", .value = 6 },
         { .name = "ext_vimclk", .value = 7 },
 #endif
-        { 0, 0 }
+        { NULL, 0 }
 };
 
 static struct clk tegra_clk_audio = {
@@ -1885,7 +1885,7 @@ static struct clk tegra_clk_audio_2x = {
         },
 };
 
-struct clk_lookup tegra_audio_clk_lookups[] = {
+static struct clk_lookup tegra_audio_clk_lookups[] = {
         { .con_id = "audio", .clk = &tegra_clk_audio },
         { .con_id = "audio_2x", .clk = &tegra_clk_audio_2x }
 };
@@ -1926,7 +1926,7 @@ static struct clk_mux_sel mux_cclk[] = {
         { .input = &tegra_pll_p_out3,   .value = 6},
         { .input = &tegra_clk_d,        .value = 7},
         { .input = &tegra_pll_x,        .value = 8},
-        { 0, 0},
+        { NULL, 0},
 };
 
 static struct clk_mux_sel mux_sclk[] = {
@@ -1938,7 +1938,7 @@ static struct clk_mux_sel mux_sclk[] = {
         { .input = &tegra_clk_d,        .value = 5},
         { .input = &tegra_clk_32k,      .value = 6},
         { .input = &tegra_pll_m_out1,   .value = 7},
-        { 0, 0},
+        { NULL, 0},
 };
 
 static struct clk tegra_clk_cclk = {
@@ -2009,7 +2009,7 @@ static struct clk_mux_sel mux_pllm_pllc_pllp_plla[] = {
         { .input = &tegra_pll_c, .value = 1},
         { .input = &tegra_pll_p, .value = 2},
         { .input = &tegra_pll_a_out0, .value = 3},
-        { 0, 0},
+        { NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllm_pllc_pllp_clkm[] = {
@@ -2017,7 +2017,7 @@ static struct clk_mux_sel mux_pllm_pllc_pllp_clkm[] = {
         { .input = &tegra_pll_c, .value = 1},
         { .input = &tegra_pll_p, .value = 2},
         { .input = &tegra_clk_m, .value = 3},
-        { 0, 0},
+        { NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllp_pllc_pllm_clkm[] = {
@@ -2025,7 +2025,7 @@ static struct clk_mux_sel mux_pllp_pllc_pllm_clkm[] = {
         { .input = &tegra_pll_c, .value = 1},
         { .input = &tegra_pll_m, .value = 2},
         { .input = &tegra_clk_m, .value = 3},
-        { 0, 0},
+        { NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllaout0_audio2x_pllp_clkm[] = {
@@ -2033,7 +2033,7 @@ static struct clk_mux_sel mux_pllaout0_audio2x_pllp_clkm[] = {
         {.input = &tegra_clk_audio_2x, .value = 1},
         {.input = &tegra_pll_p, .value = 2},
         {.input = &tegra_clk_m, .value = 3},
-        { 0, 0},
+        { NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllp_plld_pllc_clkm[] = {
@@ -2041,7 +2041,7 @@ static struct clk_mux_sel mux_pllp_plld_pllc_clkm[] = {
         {.input = &tegra_pll_d_out0, .value = 1},
         {.input = &tegra_pll_c, .value = 2},
         {.input = &tegra_clk_m, .value = 3},
-        { 0, 0},
+        { NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllp_pllc_audio_clkm_clk32[] = {
@@ -2050,39 +2050,39 @@ static struct clk_mux_sel mux_pllp_pllc_audio_clkm_clk32[] = {
         {.input = &tegra_clk_audio,     .value = 2},
         {.input = &tegra_clk_m,     .value = 3},
         {.input = &tegra_clk_32k,   .value = 4},
-        { 0, 0},
+        { NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllp_pllc_pllm[] = {
         {.input = &tegra_pll_p,     .value = 0},
         {.input = &tegra_pll_c,     .value = 1},
         {.input = &tegra_pll_m,     .value = 2},
-        { 0, 0},
+        { NULL, 0},
 };
 
 static struct clk_mux_sel mux_clk_m[] = {
         { .input = &tegra_clk_m, .value = 0},
-        { 0, 0},
+        { NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllp_out3[] = {
         { .input = &tegra_pll_p_out3, .value = 0},
-        { 0, 0},
+        { NULL, 0},
 };
 
 static struct clk_mux_sel mux_plld[] = {
         { .input = &tegra_pll_d, .value = 0},
-        { 0, 0},
+        { NULL, 0},
 };
 
 static struct clk_mux_sel mux_clk_32k[] = {
         { .input = &tegra_clk_32k, .value = 0},
-        { 0, 0},
+        { NULL, 0},
 };
 
 static struct clk_mux_sel mux_pclk[] = {
         { .input = &tegra_clk_pclk, .value = 0},
-        { 0, 0},
+        { NULL, 0},
 };
 
 static struct clk tegra_clk_emc = {
@@ -2125,7 +2125,7 @@ static struct clk tegra_clk_emc = {
                 .parent = _parent,                      \
         }
 
-struct clk tegra_list_clks[] = {
+static struct clk tegra_list_clks[] = {
         PERIPH_CLK("apbdma",    "tegra-dma",            NULL,   34,     0,      108000000, mux_pclk,                    0),
         PERIPH_CLK("rtc",       "rtc-tegra",            NULL,   4,      0,      32768,     mux_clk_32k,                 PERIPH_NO_RESET),
         PERIPH_CLK("timer",     "timer",                NULL,   5,      0,      26000000,  mux_clk_m,                   0),
@@ -2221,7 +2221,7 @@ struct clk tegra_list_clks[] = {
  * configuration.  List those here to register them twice in the clock lookup
  * table under two names.
  */
-struct clk_duplicate tegra_clk_duplicates[] = {
+static struct clk_duplicate tegra_clk_duplicates[] = {
         CLK_DUPLICATE("uarta",  "tegra_uart.0", NULL),
         CLK_DUPLICATE("uartb",  "tegra_uart.1", NULL),
         CLK_DUPLICATE("uartc",  "tegra_uart.2", NULL),
@@ -2252,7 +2252,7 @@ struct clk_duplicate tegra_clk_duplicates[] = {
                 .clk = ck,      \
         }
 
-struct clk *tegra_ptr_clks[] = {
+static struct clk *tegra_ptr_clks[] = {
         &tegra_clk_32k,
         &tegra_pll_s,
         &tegra_clk_m,
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index 90350420c4e9..e2272d263a83 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -62,9 +62,9 @@ static struct timespec persistent_ts;
 static u64 persistent_ms, last_persistent_ms;
 
 #define timer_writel(value, reg) \
-        __raw_writel(value, (u32)timer_reg_base + (reg))
+        __raw_writel(value, timer_reg_base + (reg))
 #define timer_readl(reg) \
-        __raw_readl((u32)timer_reg_base + (reg))
+        __raw_readl(timer_reg_base + (reg))
 
 static int tegra_timer_set_next_event(unsigned long cycles,
                                          struct clock_event_device *evt)
@@ -133,7 +133,7 @@ static void notrace tegra_update_sched_clock(void)
  * tegra_rtc driver could be executing to avoid race conditions
  * on the RTC shadow register
  */
-u64 tegra_rtc_read_ms(void)
+static u64 tegra_rtc_read_ms(void)
 {
         u32 ms = readl(rtc_base + RTC_MILLISECONDS);
         u32 s = readl(rtc_base + RTC_SHADOW_SECONDS);