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authorColin Cross <ccross@android.com>2010-10-20 20:47:59 -0400
committerColin Cross <ccross@android.com>2011-02-21 03:10:45 -0500
commit89a5fb84dabdf6daeae7d5301a6b1ae4754425dd (patch)
tree42b5e7c1e7fb17782b7fd7f07585a797cf18fc90 /arch/arm/mach-tegra
parent4729fd7a7dfe7847b4870801ad12222adaeb016c (diff)
ARM: tegra: cpufreq: Take an extra reference to pllx
During cpu frequency changes, take an extra reference to pllx so that it doesn't turn off and on while the cpu is temporarily on pllp. If the cpu is moved to pllp permanently, pllx will be turned off. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/cpu-tegra.c2
-rw-r--r--arch/arm/mach-tegra/tegra2_clocks.c15
2 files changed, 13 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/cpu-tegra.c b/arch/arm/mach-tegra/cpu-tegra.c
index cda03f11550e..f02ba603ceb7 100644
--- a/arch/arm/mach-tegra/cpu-tegra.c
+++ b/arch/arm/mach-tegra/cpu-tegra.c
@@ -173,6 +173,8 @@ static int tegra_cpu_init(struct cpufreq_policy *policy)
173 if (IS_ERR(cpu_clk)) 173 if (IS_ERR(cpu_clk))
174 return PTR_ERR(cpu_clk); 174 return PTR_ERR(cpu_clk);
175 175
176 clk_enable(cpu_clk);
177
176 cpufreq_frequency_table_cpuinfo(policy, freq_table); 178 cpufreq_frequency_table_cpuinfo(policy, freq_table);
177 cpufreq_frequency_table_get_attr(freq_table, policy->cpu); 179 cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
178 policy->cur = tegra_getspeed(policy->cpu); 180 policy->cur = tegra_getspeed(policy->cpu);
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index ea07f513e90c..94793dd97aec 100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -385,10 +385,16 @@ static void tegra2_cpu_clk_disable(struct clk *c)
385static int tegra2_cpu_clk_set_rate(struct clk *c, unsigned long rate) 385static int tegra2_cpu_clk_set_rate(struct clk *c, unsigned long rate)
386{ 386{
387 int ret; 387 int ret;
388 /*
389 * Take an extra reference to the main pll so it doesn't turn
390 * off when we move the cpu off of it
391 */
392 clk_enable(c->u.cpu.main);
393
388 ret = clk_set_parent(c->parent, c->u.cpu.backup); 394 ret = clk_set_parent(c->parent, c->u.cpu.backup);
389 if (ret) { 395 if (ret) {
390 pr_err("Failed to switch cpu to clock %s\n", c->u.cpu.backup->name); 396 pr_err("Failed to switch cpu to clock %s\n", c->u.cpu.backup->name);
391 return ret; 397 goto out;
392 } 398 }
393 399
394 if (rate == clk_get_rate(c->u.cpu.backup)) 400 if (rate == clk_get_rate(c->u.cpu.backup))
@@ -397,17 +403,18 @@ static int tegra2_cpu_clk_set_rate(struct clk *c, unsigned long rate)
397 ret = clk_set_rate(c->u.cpu.main, rate); 403 ret = clk_set_rate(c->u.cpu.main, rate);
398 if (ret) { 404 if (ret) {
399 pr_err("Failed to change cpu pll to %lu\n", rate); 405 pr_err("Failed to change cpu pll to %lu\n", rate);
400 return ret; 406 goto out;
401 } 407 }
402 408
403 ret = clk_set_parent(c->parent, c->u.cpu.main); 409 ret = clk_set_parent(c->parent, c->u.cpu.main);
404 if (ret) { 410 if (ret) {
405 pr_err("Failed to switch cpu to clock %s\n", c->u.cpu.main->name); 411 pr_err("Failed to switch cpu to clock %s\n", c->u.cpu.main->name);
406 return ret; 412 goto out;
407 } 413 }
408 414
409out: 415out:
410 return 0; 416 clk_disable(c->u.cpu.main);
417 return ret;
411} 418}
412 419
413static struct clk_ops tegra_cpu_ops = { 420static struct clk_ops tegra_cpu_ops = {