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authorOlof Johansson <olof@lixom.net>2011-10-10 00:05:44 -0400
committerOlof Johansson <olof@lixom.net>2011-10-13 17:07:38 -0400
commite748b7310f281d7bc739fcc8e8f71a8ac00614d7 (patch)
treec5b2455b7830da2eac79e4b0b1cc012df8cf2aa7 /arch/arm/mach-tegra
parent976d167615b64e14bc1491ca51d424e2ba9a5e84 (diff)
ARM: tegra: annotate IO_*_VIRT pointers
Provide __iomem annotation for IO_*_VIRT pointers, which will propagate up through IO_TO_VIRT(). Also fixes a 0 to NULL conversion of the base case to silence sparse. Unfortunately map_desc takes an unsigned long for the pointer instead of a void __iomem *. For now, cast explicitly for those cases. v2: change define to use IOMEM() like many other mach platforms per comment from Russell. Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/include/mach/io.h18
-rw-r--r--arch/arm/mach-tegra/io.c8
2 files changed, 16 insertions, 10 deletions
diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h
index 4cea2230c8dc..35a011fbc42d 100644
--- a/arch/arm/mach-tegra/include/mach/io.h
+++ b/arch/arm/mach-tegra/include/mach/io.h
@@ -33,20 +33,26 @@
33 * 33 *
34 */ 34 */
35 35
36#ifdef __ASSEMBLY__
37#define IOMEM(x) (x)
38#else
39#define IOMEM(x) ((void __force __iomem *)(x))
40#endif
41
36#define IO_IRAM_PHYS 0x40000000 42#define IO_IRAM_PHYS 0x40000000
37#define IO_IRAM_VIRT 0xFE400000 43#define IO_IRAM_VIRT IOMEM(0xFE400000)
38#define IO_IRAM_SIZE SZ_256K 44#define IO_IRAM_SIZE SZ_256K
39 45
40#define IO_CPU_PHYS 0x50040000 46#define IO_CPU_PHYS 0x50040000
41#define IO_CPU_VIRT 0xFE000000 47#define IO_CPU_VIRT IOMEM(0xFE000000)
42#define IO_CPU_SIZE SZ_16K 48#define IO_CPU_SIZE SZ_16K
43 49
44#define IO_PPSB_PHYS 0x60000000 50#define IO_PPSB_PHYS 0x60000000
45#define IO_PPSB_VIRT 0xFE200000 51#define IO_PPSB_VIRT IOMEM(0xFE200000)
46#define IO_PPSB_SIZE SZ_1M 52#define IO_PPSB_SIZE SZ_1M
47 53
48#define IO_APB_PHYS 0x70000000 54#define IO_APB_PHYS 0x70000000
49#define IO_APB_VIRT 0xFE300000 55#define IO_APB_VIRT IOMEM(0xFE300000)
50#define IO_APB_SIZE SZ_1M 56#define IO_APB_SIZE SZ_1M
51 57
52#define IO_TO_VIRT_BETWEEN(p, st, sz) ((p) >= (st) && (p) < ((st) + (sz))) 58#define IO_TO_VIRT_BETWEEN(p, st, sz) ((p) >= (st) && (p) < ((st) + (sz)))
@@ -61,7 +67,7 @@
61 IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) : \ 67 IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) : \
62 IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ? \ 68 IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ? \
63 IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) : \ 69 IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) : \
64 0) 70 NULL)
65 71
66#ifndef __ASSEMBLER__ 72#ifndef __ASSEMBLER__
67 73
@@ -71,7 +77,7 @@
71void __iomem *tegra_ioremap(unsigned long phys, size_t size, unsigned int type); 77void __iomem *tegra_ioremap(unsigned long phys, size_t size, unsigned int type);
72void tegra_iounmap(volatile void __iomem *addr); 78void tegra_iounmap(volatile void __iomem *addr);
73 79
74#define IO_ADDRESS(n) ((void __iomem *) IO_TO_VIRT(n)) 80#define IO_ADDRESS(n) (IO_TO_VIRT(n))
75 81
76#ifdef CONFIG_TEGRA_PCI 82#ifdef CONFIG_TEGRA_PCI
77extern void __iomem *tegra_pcie_io_base; 83extern void __iomem *tegra_pcie_io_base;
diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c
index ea50fe28cf6a..5489f8b5d6ad 100644
--- a/arch/arm/mach-tegra/io.c
+++ b/arch/arm/mach-tegra/io.c
@@ -31,25 +31,25 @@
31 31
32static struct map_desc tegra_io_desc[] __initdata = { 32static struct map_desc tegra_io_desc[] __initdata = {
33 { 33 {
34 .virtual = IO_PPSB_VIRT, 34 .virtual = (unsigned long)IO_PPSB_VIRT,
35 .pfn = __phys_to_pfn(IO_PPSB_PHYS), 35 .pfn = __phys_to_pfn(IO_PPSB_PHYS),
36 .length = IO_PPSB_SIZE, 36 .length = IO_PPSB_SIZE,
37 .type = MT_DEVICE, 37 .type = MT_DEVICE,
38 }, 38 },
39 { 39 {
40 .virtual = IO_APB_VIRT, 40 .virtual = (unsigned long)IO_APB_VIRT,
41 .pfn = __phys_to_pfn(IO_APB_PHYS), 41 .pfn = __phys_to_pfn(IO_APB_PHYS),
42 .length = IO_APB_SIZE, 42 .length = IO_APB_SIZE,
43 .type = MT_DEVICE, 43 .type = MT_DEVICE,
44 }, 44 },
45 { 45 {
46 .virtual = IO_CPU_VIRT, 46 .virtual = (unsigned long)IO_CPU_VIRT,
47 .pfn = __phys_to_pfn(IO_CPU_PHYS), 47 .pfn = __phys_to_pfn(IO_CPU_PHYS),
48 .length = IO_CPU_SIZE, 48 .length = IO_CPU_SIZE,
49 .type = MT_DEVICE, 49 .type = MT_DEVICE,
50 }, 50 },
51 { 51 {
52 .virtual = IO_IRAM_VIRT, 52 .virtual = (unsigned long)IO_IRAM_VIRT,
53 .pfn = __phys_to_pfn(IO_IRAM_PHYS), 53 .pfn = __phys_to_pfn(IO_IRAM_PHYS),
54 .length = IO_IRAM_SIZE, 54 .length = IO_IRAM_SIZE,
55 .type = MT_DEVICE, 55 .type = MT_DEVICE,