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authorLaxman Dewangan <ldewangan@nvidia.com>2012-06-20 08:36:34 -0400
committerStephen Warren <swarren@nvidia.com>2012-07-06 13:48:56 -0400
commitb861c275ea5cfeab32241c3c92a203579d5699ff (patch)
tree42f5a062a8c5856681d56aa8eda0d0fbb13220ac /arch/arm/mach-tegra
parent702b0e4f2f2782962aab7d9a0a40ad68770bb1f6 (diff)
ARM: tegra: apbio access using dma for tegra20 only
The Tegra20 HW issue with accessing APBIO registers (such as fuse registers) directly from the CPU concurrently with APB DMA accesses has been fixed in Tegra30 and later chips. Access these registers directly from the CPU on Tegra30 and later, and apply the workaround only for Tegra20. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Chaitanya Bandi <bandik@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/Makefile3
-rw-r--r--arch/arm/mach-tegra/apbio.c59
-rw-r--r--arch/arm/mach-tegra/apbio.h19
-rw-r--r--arch/arm/mach-tegra/common.c3
4 files changed, 60 insertions, 24 deletions
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 2eb4445ddb14..e9f48ec00ca7 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -8,6 +8,7 @@ obj-y += timer.o
8obj-y += fuse.o 8obj-y += fuse.o
9obj-y += pmc.o 9obj-y += pmc.o
10obj-y += flowctrl.o 10obj-y += flowctrl.o
11obj-y += apbio.o
11obj-$(CONFIG_CPU_IDLE) += cpuidle.o 12obj-$(CONFIG_CPU_IDLE) += cpuidle.o
12obj-$(CONFIG_CPU_IDLE) += sleep.o 13obj-$(CONFIG_CPU_IDLE) += sleep.o
13obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += powergate.o 14obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += powergate.o
@@ -18,7 +19,7 @@ obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30_clocks.o
18obj-$(CONFIG_SMP) += platsmp.o headsmp.o 19obj-$(CONFIG_SMP) += platsmp.o headsmp.o
19obj-$(CONFIG_SMP) += reset.o 20obj-$(CONFIG_SMP) += reset.o
20obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 21obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
21obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o apbio.o 22obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o
22obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o 23obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o
23obj-$(CONFIG_TEGRA_PCI) += pcie.o 24obj-$(CONFIG_TEGRA_PCI) += pcie.o
24obj-$(CONFIG_USB_SUPPORT) += usb_phy.o 25obj-$(CONFIG_USB_SUPPORT) += usb_phy.o
diff --git a/arch/arm/mach-tegra/apbio.c b/arch/arm/mach-tegra/apbio.c
index e75451e517bd..74ac0db53739 100644
--- a/arch/arm/mach-tegra/apbio.c
+++ b/arch/arm/mach-tegra/apbio.c
@@ -15,6 +15,10 @@
15 15
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <mach/iomap.h>
19#include <linux/of.h>
20
21#ifdef CONFIG_TEGRA_SYSTEM_DMA
18#include <linux/dma-mapping.h> 22#include <linux/dma-mapping.h>
19#include <linux/spinlock.h> 23#include <linux/spinlock.h>
20#include <linux/completion.h> 24#include <linux/completion.h>
@@ -22,7 +26,6 @@
22#include <linux/mutex.h> 26#include <linux/mutex.h>
23 27
24#include <mach/dma.h> 28#include <mach/dma.h>
25#include <mach/iomap.h>
26 29
27#include "apbio.h" 30#include "apbio.h"
28 31
@@ -33,6 +36,9 @@ static u32 *tegra_apb_bb;
33static dma_addr_t tegra_apb_bb_phys; 36static dma_addr_t tegra_apb_bb_phys;
34static DECLARE_COMPLETION(tegra_apb_wait); 37static DECLARE_COMPLETION(tegra_apb_wait);
35 38
39static u32 tegra_apb_readl_direct(unsigned long offset);
40static void tegra_apb_writel_direct(u32 value, unsigned long offset);
41
36bool tegra_apb_init(void) 42bool tegra_apb_init(void)
37{ 43{
38 struct tegra_dma_channel *ch; 44 struct tegra_dma_channel *ch;
@@ -72,13 +78,13 @@ static void apb_dma_complete(struct tegra_dma_req *req)
72 complete(&tegra_apb_wait); 78 complete(&tegra_apb_wait);
73} 79}
74 80
75u32 tegra_apb_readl(unsigned long offset) 81static u32 tegra_apb_readl_using_dma(unsigned long offset)
76{ 82{
77 struct tegra_dma_req req; 83 struct tegra_dma_req req;
78 int ret; 84 int ret;
79 85
80 if (!tegra_apb_dma && !tegra_apb_init()) 86 if (!tegra_apb_dma && !tegra_apb_init())
81 return readl(IO_TO_VIRT(offset)); 87 return tegra_apb_readl_direct(offset);
82 88
83 mutex_lock(&tegra_apb_dma_lock); 89 mutex_lock(&tegra_apb_dma_lock);
84 req.complete = apb_dma_complete; 90 req.complete = apb_dma_complete;
@@ -108,13 +114,13 @@ u32 tegra_apb_readl(unsigned long offset)
108 return *((u32 *)tegra_apb_bb); 114 return *((u32 *)tegra_apb_bb);
109} 115}
110 116
111void tegra_apb_writel(u32 value, unsigned long offset) 117static void tegra_apb_writel_using_dma(u32 value, unsigned long offset)
112{ 118{
113 struct tegra_dma_req req; 119 struct tegra_dma_req req;
114 int ret; 120 int ret;
115 121
116 if (!tegra_apb_dma && !tegra_apb_init()) { 122 if (!tegra_apb_dma && !tegra_apb_init()) {
117 writel(value, IO_TO_VIRT(offset)); 123 tegra_apb_writel_direct(value, offset);
118 return; 124 return;
119 } 125 }
120 126
@@ -143,3 +149,46 @@ void tegra_apb_writel(u32 value, unsigned long offset)
143 149
144 mutex_unlock(&tegra_apb_dma_lock); 150 mutex_unlock(&tegra_apb_dma_lock);
145} 151}
152#else
153#define tegra_apb_readl_using_dma tegra_apb_readl_direct
154#define tegra_apb_writel_using_dma tegra_apb_writel_direct
155#endif
156
157typedef u32 (*apbio_read_fptr)(unsigned long offset);
158typedef void (*apbio_write_fptr)(u32 value, unsigned long offset);
159
160static apbio_read_fptr apbio_read;
161static apbio_write_fptr apbio_write;
162
163static u32 tegra_apb_readl_direct(unsigned long offset)
164{
165 return readl(IO_TO_VIRT(offset));
166}
167
168static void tegra_apb_writel_direct(u32 value, unsigned long offset)
169{
170 writel(value, IO_TO_VIRT(offset));
171}
172
173void tegra_apb_io_init(void)
174{
175 /* Need to use dma only when it is Tegra20 based platform */
176 if (of_machine_is_compatible("nvidia,tegra20") ||
177 !of_have_populated_dt()) {
178 apbio_read = tegra_apb_readl_using_dma;
179 apbio_write = tegra_apb_writel_using_dma;
180 } else {
181 apbio_read = tegra_apb_readl_direct;
182 apbio_write = tegra_apb_writel_direct;
183 }
184}
185
186u32 tegra_apb_readl(unsigned long offset)
187{
188 return apbio_read(offset);
189}
190
191void tegra_apb_writel(u32 value, unsigned long offset)
192{
193 apbio_write(value, offset);
194}
diff --git a/arch/arm/mach-tegra/apbio.h b/arch/arm/mach-tegra/apbio.h
index 8b49e8c89a64..f05d71c303c7 100644
--- a/arch/arm/mach-tegra/apbio.h
+++ b/arch/arm/mach-tegra/apbio.h
@@ -16,24 +16,7 @@
16#ifndef __MACH_TEGRA_APBIO_H 16#ifndef __MACH_TEGRA_APBIO_H
17#define __MACH_TEGRA_APBIO_H 17#define __MACH_TEGRA_APBIO_H
18 18
19#ifdef CONFIG_TEGRA_SYSTEM_DMA 19void tegra_apb_io_init(void);
20
21u32 tegra_apb_readl(unsigned long offset); 20u32 tegra_apb_readl(unsigned long offset);
22void tegra_apb_writel(u32 value, unsigned long offset); 21void tegra_apb_writel(u32 value, unsigned long offset);
23
24#else
25#include <asm/io.h>
26#include <mach/io.h>
27
28static inline u32 tegra_apb_readl(unsigned long offset)
29{
30 return readl(IO_TO_VIRT(offset));
31}
32
33static inline void tegra_apb_writel(u32 value, unsigned long offset)
34{
35 writel(value, IO_TO_VIRT(offset));
36}
37#endif
38
39#endif 22#endif
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 204a5c8b0b57..96fef6bcc651 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -33,6 +33,7 @@
33#include "clock.h" 33#include "clock.h"
34#include "fuse.h" 34#include "fuse.h"
35#include "pmc.h" 35#include "pmc.h"
36#include "apbio.h"
36 37
37/* 38/*
38 * Storage for debug-macro.S's state. 39 * Storage for debug-macro.S's state.
@@ -127,6 +128,7 @@ static void __init tegra_init_cache(u32 tag_latency, u32 data_latency)
127#ifdef CONFIG_ARCH_TEGRA_2x_SOC 128#ifdef CONFIG_ARCH_TEGRA_2x_SOC
128void __init tegra20_init_early(void) 129void __init tegra20_init_early(void)
129{ 130{
131 tegra_apb_io_init();
130 tegra_init_fuse(); 132 tegra_init_fuse();
131 tegra2_init_clocks(); 133 tegra2_init_clocks();
132 tegra_clk_init_from_table(tegra20_clk_init_table); 134 tegra_clk_init_from_table(tegra20_clk_init_table);
@@ -138,6 +140,7 @@ void __init tegra20_init_early(void)
138#ifdef CONFIG_ARCH_TEGRA_3x_SOC 140#ifdef CONFIG_ARCH_TEGRA_3x_SOC
139void __init tegra30_init_early(void) 141void __init tegra30_init_early(void)
140{ 142{
143 tegra_apb_io_init();
141 tegra_init_fuse(); 144 tegra_init_fuse();
142 tegra30_init_clocks(); 145 tegra30_init_clocks();
143 tegra_clk_init_from_table(tegra30_clk_init_table); 146 tegra_clk_init_from_table(tegra30_clk_init_table);