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authorOlof Johansson <olof@lixom.net>2013-12-26 14:00:13 -0500
committerOlof Johansson <olof@lixom.net>2013-12-26 14:01:11 -0500
commit51b052b0d31666e64cb97d3c620c0baff4792d91 (patch)
treeccdc40870bcc30d703ec891904d1bfd1f3e53c30 /arch/arm/mach-tegra
parent4ac63adc4f29f92a019b54eb02425357cf6c2967 (diff)
parentf47d41acfd65919c669921674444caa471723c87 (diff)
Merge tag 'tegra-for-3.14-trusted-foundations' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
From Stephen Warren: ARM: tegra: Trusted Foundations firmware support Add support for the Trusted Foundations secure-mode firmware, as found on NVIDIA SHIELD. This allows Linux to run in non-secure mode on this board; all previous Tegra support has assumed the kernel is running in secure mode. (The base TF support has been discussed back and forth a lot; for now the most logical place for it seems to be under arch/arm, so we're adding it here. We can move it out to a common location in the future if needed). * tag 'tegra-for-3.14-trusted-foundations' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: support Trusted Foundations by default ARM: tegra: set CPU reset handler using firmware ARM: tegra: split setting of CPU reset handler ARM: tegra: add support for Trusted Foundations of: add Trusted Foundations bindings documentation of: add vendor prefix for Trusted Logic Mobility ARM: add basic support for Trusted Foundations Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/Kconfig1
-rw-r--r--arch/arm/mach-tegra/reset.c40
-rw-r--r--arch/arm/mach-tegra/tegra.c2
3 files changed, 32 insertions, 11 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 09e740f58b27..00b85fd9285d 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -2,6 +2,7 @@ config ARCH_TEGRA
2 bool "NVIDIA Tegra" if ARCH_MULTI_V7 2 bool "NVIDIA Tegra" if ARCH_MULTI_V7
3 select ARCH_HAS_CPUFREQ 3 select ARCH_HAS_CPUFREQ
4 select ARCH_REQUIRE_GPIOLIB 4 select ARCH_REQUIRE_GPIOLIB
5 select ARCH_SUPPORTS_TRUSTED_FOUNDATIONS
5 select ARM_GIC 6 select ARM_GIC
6 select CLKSRC_MMIO 7 select CLKSRC_MMIO
7 select CLKSRC_OF 8 select CLKSRC_OF
diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c
index 568f5bbf979d..146fe8e0ae7c 100644
--- a/arch/arm/mach-tegra/reset.c
+++ b/arch/arm/mach-tegra/reset.c
@@ -21,6 +21,7 @@
21 21
22#include <asm/cacheflush.h> 22#include <asm/cacheflush.h>
23#include <asm/hardware/cache-l2x0.h> 23#include <asm/hardware/cache-l2x0.h>
24#include <asm/firmware.h>
24 25
25#include "iomap.h" 26#include "iomap.h"
26#include "irammap.h" 27#include "irammap.h"
@@ -33,26 +34,18 @@
33 34
34static bool is_enabled; 35static bool is_enabled;
35 36
36static void __init tegra_cpu_reset_handler_enable(void) 37static void __init tegra_cpu_reset_handler_set(const u32 reset_address)
37{ 38{
38 void __iomem *iram_base = IO_ADDRESS(TEGRA_IRAM_RESET_BASE);
39 void __iomem *evp_cpu_reset = 39 void __iomem *evp_cpu_reset =
40 IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE + 0x100); 40 IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE + 0x100);
41 void __iomem *sb_ctrl = IO_ADDRESS(TEGRA_SB_BASE); 41 void __iomem *sb_ctrl = IO_ADDRESS(TEGRA_SB_BASE);
42 u32 reg; 42 u32 reg;
43 43
44 BUG_ON(is_enabled);
45 BUG_ON(tegra_cpu_reset_handler_size > TEGRA_IRAM_RESET_HANDLER_SIZE);
46
47 memcpy(iram_base, (void *)__tegra_cpu_reset_handler_start,
48 tegra_cpu_reset_handler_size);
49
50 /* 44 /*
51 * NOTE: This must be the one and only write to the EVP CPU reset 45 * NOTE: This must be the one and only write to the EVP CPU reset
52 * vector in the entire system. 46 * vector in the entire system.
53 */ 47 */
54 writel(TEGRA_IRAM_RESET_BASE + tegra_cpu_reset_handler_offset, 48 writel(reset_address, evp_cpu_reset);
55 evp_cpu_reset);
56 wmb(); 49 wmb();
57 reg = readl(evp_cpu_reset); 50 reg = readl(evp_cpu_reset);
58 51
@@ -66,8 +59,33 @@ static void __init tegra_cpu_reset_handler_enable(void)
66 writel(reg, sb_ctrl); 59 writel(reg, sb_ctrl);
67 wmb(); 60 wmb();
68 } 61 }
62}
63
64static void __init tegra_cpu_reset_handler_enable(void)
65{
66 void __iomem *iram_base = IO_ADDRESS(TEGRA_IRAM_RESET_BASE);
67 const u32 reset_address = TEGRA_IRAM_RESET_BASE +
68 tegra_cpu_reset_handler_offset;
69 int err;
70
71 BUG_ON(is_enabled);
72 BUG_ON(tegra_cpu_reset_handler_size > TEGRA_IRAM_RESET_HANDLER_SIZE);
69 73
70 is_enabled = true; 74 memcpy(iram_base, (void *)__tegra_cpu_reset_handler_start,
75 tegra_cpu_reset_handler_size);
76
77 err = call_firmware_op(set_cpu_boot_addr, 0, reset_address);
78 switch (err) {
79 case -ENOSYS:
80 tegra_cpu_reset_handler_set(reset_address);
81 /* pass-through */
82 case 0:
83 is_enabled = true;
84 break;
85 default:
86 pr_crit("Cannot set CPU reset handler: %d\n", err);
87 BUG();
88 }
71} 89}
72 90
73void __init tegra_cpu_reset_handler_init(void) 91void __init tegra_cpu_reset_handler_init(void)
diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c
index 73368176c6e8..09a1f8d98ca2 100644
--- a/arch/arm/mach-tegra/tegra.c
+++ b/arch/arm/mach-tegra/tegra.c
@@ -40,6 +40,7 @@
40#include <asm/mach/arch.h> 40#include <asm/mach/arch.h>
41#include <asm/mach/time.h> 41#include <asm/mach/time.h>
42#include <asm/setup.h> 42#include <asm/setup.h>
43#include <asm/trusted_foundations.h>
43 44
44#include "apbio.h" 45#include "apbio.h"
45#include "board.h" 46#include "board.h"
@@ -90,6 +91,7 @@ static void __init tegra_init_cache(void)
90 91
91static void __init tegra_init_early(void) 92static void __init tegra_init_early(void)
92{ 93{
94 of_register_trusted_foundations();
93 tegra_apb_io_init(); 95 tegra_apb_io_init();
94 tegra_init_fuse(); 96 tegra_init_fuse();
95 tegra_cpu_reset_handler_init(); 97 tegra_cpu_reset_handler_init();