aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-tegra
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2011-01-15 15:33:40 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2011-01-15 15:33:40 -0500
commit16c1020362083b320868c0deef492249089c3cd3 (patch)
treeff200df3502e6010745713275d69fd0a07e399cf /arch/arm/mach-tegra
parent65e5d002b5ad220db2bf9557f53de5a98f7dab86 (diff)
parentbbba75606963c82febf7bd2761ea848ac5d1a1bb (diff)
Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (161 commits) ARM: pxa: fix building issue of missing physmap.h ARM: mmp: PXA910 drive strength FAST using wrong value ARM: mmp: MMP2 drive strength FAST using wrong value ARM: pxa: fix recursive calls in pxa_low_gpio_chip AT91: Support for gsia18s board AT91: Acme Systems FOX Board G20 board files AT91: board-sam9m10g45ek.c: Remove duplicate inclusion of mach/hardware.h ARM: pxa: fix suspend/resume array index miscalculation ARM: pxa: use cpu_has_ipr() consistently in irq.c ARM: pxa: remove unused variable in clock-pxa3xx.c ARM: pxa: fix warning in zeus.c ARM: sa1111: fix typo in sa1111_retrigger_lowirq() ARM mxs: clkdev related compile fixes ARM i.MX mx31_3ds: Fix MC13783 regulator names ARM: plat-stmp3xxx: irq_data conversion. ARM: plat-spear: irq_data conversion. ARM: plat-orion: irq_data conversion. ARM: plat-omap: irq_data conversion. ARM: plat-nomadik: irq_data conversion. ARM: plat-mxc: irq_data conversion. ... Fix up trivial conflict in arch/arm/plat-omap/gpio.c (Lennert Buytenhek's irq_data conversion clashing with some omap irq updates)
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/gpio.c38
-rw-r--r--arch/arm/mach-tegra/irq.c36
2 files changed, 37 insertions, 37 deletions
diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c
index 0775265e69f5..bd066206e110 100644
--- a/arch/arm/mach-tegra/gpio.c
+++ b/arch/arm/mach-tegra/gpio.c
@@ -142,31 +142,31 @@ static struct gpio_chip tegra_gpio_chip = {
142 .ngpio = TEGRA_NR_GPIOS, 142 .ngpio = TEGRA_NR_GPIOS,
143}; 143};
144 144
145static void tegra_gpio_irq_ack(unsigned int irq) 145static void tegra_gpio_irq_ack(struct irq_data *d)
146{ 146{
147 int gpio = irq - INT_GPIO_BASE; 147 int gpio = d->irq - INT_GPIO_BASE;
148 148
149 __raw_writel(1 << GPIO_BIT(gpio), GPIO_INT_CLR(gpio)); 149 __raw_writel(1 << GPIO_BIT(gpio), GPIO_INT_CLR(gpio));
150} 150}
151 151
152static void tegra_gpio_irq_mask(unsigned int irq) 152static void tegra_gpio_irq_mask(struct irq_data *d)
153{ 153{
154 int gpio = irq - INT_GPIO_BASE; 154 int gpio = d->irq - INT_GPIO_BASE;
155 155
156 tegra_gpio_mask_write(GPIO_MSK_INT_ENB(gpio), gpio, 0); 156 tegra_gpio_mask_write(GPIO_MSK_INT_ENB(gpio), gpio, 0);
157} 157}
158 158
159static void tegra_gpio_irq_unmask(unsigned int irq) 159static void tegra_gpio_irq_unmask(struct irq_data *d)
160{ 160{
161 int gpio = irq - INT_GPIO_BASE; 161 int gpio = d->irq - INT_GPIO_BASE;
162 162
163 tegra_gpio_mask_write(GPIO_MSK_INT_ENB(gpio), gpio, 1); 163 tegra_gpio_mask_write(GPIO_MSK_INT_ENB(gpio), gpio, 1);
164} 164}
165 165
166static int tegra_gpio_irq_set_type(unsigned int irq, unsigned int type) 166static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type)
167{ 167{
168 int gpio = irq - INT_GPIO_BASE; 168 int gpio = d->irq - INT_GPIO_BASE;
169 struct tegra_gpio_bank *bank = get_irq_chip_data(irq); 169 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d);
170 int port = GPIO_PORT(gpio); 170 int port = GPIO_PORT(gpio);
171 int lvl_type; 171 int lvl_type;
172 int val; 172 int val;
@@ -221,7 +221,7 @@ static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
221 int pin; 221 int pin;
222 int unmasked = 0; 222 int unmasked = 0;
223 223
224 desc->chip->ack(irq); 224 desc->irq_data.chip->irq_ack(&desc->irq_data);
225 225
226 bank = get_irq_data(irq); 226 bank = get_irq_data(irq);
227 227
@@ -240,7 +240,7 @@ static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
240 */ 240 */
241 if (lvl & (0x100 << pin)) { 241 if (lvl & (0x100 << pin)) {
242 unmasked = 1; 242 unmasked = 1;
243 desc->chip->unmask(irq); 243 desc->irq_data.chip->irq_unmask(&desc->irq_data);
244 } 244 }
245 245
246 generic_handle_irq(gpio_to_irq(gpio + pin)); 246 generic_handle_irq(gpio_to_irq(gpio + pin));
@@ -248,7 +248,7 @@ static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
248 } 248 }
249 249
250 if (!unmasked) 250 if (!unmasked)
251 desc->chip->unmask(irq); 251 desc->irq_data.chip->irq_unmask(&desc->irq_data);
252 252
253} 253}
254 254
@@ -316,21 +316,21 @@ void tegra_gpio_suspend(void)
316 local_irq_restore(flags); 316 local_irq_restore(flags);
317} 317}
318 318
319static int tegra_gpio_wake_enable(unsigned int irq, unsigned int enable) 319static int tegra_gpio_wake_enable(struct irq_data *d, unsigned int enable)
320{ 320{
321 struct tegra_gpio_bank *bank = get_irq_chip_data(irq); 321 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d);
322 return set_irq_wake(bank->irq, enable); 322 return set_irq_wake(bank->irq, enable);
323} 323}
324#endif 324#endif
325 325
326static struct irq_chip tegra_gpio_irq_chip = { 326static struct irq_chip tegra_gpio_irq_chip = {
327 .name = "GPIO", 327 .name = "GPIO",
328 .ack = tegra_gpio_irq_ack, 328 .irq_ack = tegra_gpio_irq_ack,
329 .mask = tegra_gpio_irq_mask, 329 .irq_mask = tegra_gpio_irq_mask,
330 .unmask = tegra_gpio_irq_unmask, 330 .irq_unmask = tegra_gpio_irq_unmask,
331 .set_type = tegra_gpio_irq_set_type, 331 .irq_set_type = tegra_gpio_irq_set_type,
332#ifdef CONFIG_PM 332#ifdef CONFIG_PM
333 .set_wake = tegra_gpio_wake_enable, 333 .irq_set_wake = tegra_gpio_wake_enable,
334#endif 334#endif
335}; 335};
336 336
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c
index 5407de01abf0..de7dfad6f769 100644
--- a/arch/arm/mach-tegra/irq.c
+++ b/arch/arm/mach-tegra/irq.c
@@ -46,30 +46,30 @@
46#define ICTLR_COP_IER_CLR 0x38 46#define ICTLR_COP_IER_CLR 0x38
47#define ICTLR_COP_IEP_CLASS 0x3c 47#define ICTLR_COP_IEP_CLASS 0x3c
48 48
49static void (*gic_mask_irq)(unsigned int irq); 49static void (*gic_mask_irq)(struct irq_data *d);
50static void (*gic_unmask_irq)(unsigned int irq); 50static void (*gic_unmask_irq)(struct irq_data *d);
51 51
52#define irq_to_ictlr(irq) (((irq)-32) >> 5) 52#define irq_to_ictlr(irq) (((irq)-32) >> 5)
53static void __iomem *tegra_ictlr_base = IO_ADDRESS(TEGRA_PRIMARY_ICTLR_BASE); 53static void __iomem *tegra_ictlr_base = IO_ADDRESS(TEGRA_PRIMARY_ICTLR_BASE);
54#define ictlr_to_virt(ictlr) (tegra_ictlr_base + (ictlr)*0x100) 54#define ictlr_to_virt(ictlr) (tegra_ictlr_base + (ictlr)*0x100)
55 55
56static void tegra_mask(unsigned int irq) 56static void tegra_mask(struct irq_data *d)
57{ 57{
58 void __iomem *addr = ictlr_to_virt(irq_to_ictlr(irq)); 58 void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq));
59 gic_mask_irq(irq); 59 gic_mask_irq(d);
60 writel(1<<(irq&31), addr+ICTLR_CPU_IER_CLR); 60 writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_CLR);
61} 61}
62 62
63static void tegra_unmask(unsigned int irq) 63static void tegra_unmask(struct irq_data *d)
64{ 64{
65 void __iomem *addr = ictlr_to_virt(irq_to_ictlr(irq)); 65 void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq));
66 gic_unmask_irq(irq); 66 gic_unmask_irq(d);
67 writel(1<<(irq&31), addr+ICTLR_CPU_IER_SET); 67 writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_SET);
68} 68}
69 69
70#ifdef CONFIG_PM 70#ifdef CONFIG_PM
71 71
72static int tegra_set_wake(unsigned int irq, unsigned int on) 72static int tegra_set_wake(struct irq_data *d, unsigned int on)
73{ 73{
74 return 0; 74 return 0;
75} 75}
@@ -77,10 +77,10 @@ static int tegra_set_wake(unsigned int irq, unsigned int on)
77 77
78static struct irq_chip tegra_irq = { 78static struct irq_chip tegra_irq = {
79 .name = "PPI", 79 .name = "PPI",
80 .mask = tegra_mask, 80 .irq_mask = tegra_mask,
81 .unmask = tegra_unmask, 81 .irq_unmask = tegra_unmask,
82#ifdef CONFIG_PM 82#ifdef CONFIG_PM
83 .set_wake = tegra_set_wake, 83 .irq_set_wake = tegra_set_wake,
84#endif 84#endif
85}; 85};
86 86
@@ -98,11 +98,11 @@ void __init tegra_init_irq(void)
98 IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100)); 98 IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
99 99
100 gic = get_irq_chip(29); 100 gic = get_irq_chip(29);
101 gic_unmask_irq = gic->unmask; 101 gic_unmask_irq = gic->irq_unmask;
102 gic_mask_irq = gic->mask; 102 gic_mask_irq = gic->irq_mask;
103 tegra_irq.ack = gic->ack; 103 tegra_irq.irq_ack = gic->irq_ack;
104#ifdef CONFIG_SMP 104#ifdef CONFIG_SMP
105 tegra_irq.set_affinity = gic->set_affinity; 105 tegra_irq.irq_set_affinity = gic->irq_set_affinity;
106#endif 106#endif
107 107
108 for (i = INT_PRI_BASE; i < INT_GPIO_BASE; i++) { 108 for (i = INT_PRI_BASE; i < INT_GPIO_BASE; i++) {