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authorGrant Likely <grant.likely@secretlab.ca>2011-07-19 19:26:54 -0400
committerGrant Likely <grant.likely@secretlab.ca>2011-07-28 03:32:04 -0400
commit8e267f3da5f117d2f1316cf6ddf740f93f1c73aa (patch)
tree19c7739b88de481618e0f461a83a1bb46a9ef5e2 /arch/arm/mach-tegra
parent3ba7222ac992d24d09ccd0b55940b54849eef752 (diff)
arm/dt: tegra devicetree support
Everything required to populate NVIDIA Tegra devices from the device tree. This patch adds a new DT_MACHINE_DESC() which matches against a tegra20 device tree. So far it only registers the on-chip devices, but it will be refined in follow on patches to configure clocks and pin IO from the device tree also. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/Kconfig6
-rw-r--r--arch/arm/mach-tegra/Makefile3
-rw-r--r--arch/arm/mach-tegra/Makefile.boot3
-rw-r--r--arch/arm/mach-tegra/board-dt.c119
4 files changed, 131 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 5ec1846aa1d0..4b8abf93bd95 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -51,6 +51,12 @@ config MACH_SEABOARD
51 also be included for some of the derivative boards that 51 also be included for some of the derivative boards that
52 have large similarities with the seaboard design. 52 have large similarities with the seaboard design.
53 53
54config MACH_TEGRA_DT
55 bool "Generic Tegra board (FDT support)"
56 select USE_OF
57 help
58 Support for generic nVidia Tegra boards using Flattened Device Tree
59
54config MACH_TRIMSLICE 60config MACH_TRIMSLICE
55 bool "TrimSlice board" 61 bool "TrimSlice board"
56 select TEGRA_PCI 62 select TEGRA_PCI
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index ed58ef9019b5..f11b9100114a 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -29,5 +29,8 @@ obj-${CONFIG_MACH_PAZ00} += board-paz00-pinmux.o
29obj-${CONFIG_MACH_SEABOARD} += board-seaboard.o 29obj-${CONFIG_MACH_SEABOARD} += board-seaboard.o
30obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o 30obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o
31 31
32obj-${CONFIG_MACH_TEGRA_DT} += board-dt.o
33obj-${CONFIG_MACH_TEGRA_DT} += board-harmony-pinmux.o
34
32obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice.o 35obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice.o
33obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice-pinmux.o 36obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice-pinmux.o
diff --git a/arch/arm/mach-tegra/Makefile.boot b/arch/arm/mach-tegra/Makefile.boot
index db52d61a7386..428ad122be03 100644
--- a/arch/arm/mach-tegra/Makefile.boot
+++ b/arch/arm/mach-tegra/Makefile.boot
@@ -1,3 +1,6 @@
1zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00008000 1zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00008000
2params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100 2params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100
3initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000 3initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000
4
5dtb-$(CONFIG_MACH_HARMONY) += tegra-harmony.dtb
6dtb-$(CONFIG_MACH_SEABOARD) += tegra-seaboard.dtb
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
new file mode 100644
index 000000000000..9f47e04446f3
--- /dev/null
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -0,0 +1,119 @@
1/*
2 * nVidia Tegra device tree board support
3 *
4 * Copyright (C) 2010 Secret Lab Technologies, Ltd.
5 * Copyright (C) 2010 Google, Inc.
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#include <linux/kernel.h>
19#include <linux/init.h>
20#include <linux/platform_device.h>
21#include <linux/serial_8250.h>
22#include <linux/clk.h>
23#include <linux/dma-mapping.h>
24#include <linux/irqdomain.h>
25#include <linux/of.h>
26#include <linux/of_address.h>
27#include <linux/of_fdt.h>
28#include <linux/of_irq.h>
29#include <linux/of_platform.h>
30#include <linux/pda_power.h>
31#include <linux/io.h>
32#include <linux/i2c.h>
33#include <linux/i2c-tegra.h>
34
35#include <asm/mach-types.h>
36#include <asm/mach/arch.h>
37#include <asm/mach/time.h>
38#include <asm/setup.h>
39
40#include <mach/iomap.h>
41#include <mach/irqs.h>
42
43#include "board.h"
44#include "board-harmony.h"
45#include "clock.h"
46#include "devices.h"
47
48void harmony_pinmux_init(void);
49void seaboard_pinmux_init(void);
50
51
52struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
53 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
54 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
55 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
56 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC4_BASE, "sdhci-tegra.3", NULL),
57 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL),
58 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL),
59 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL),
60 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_DVC_BASE, "tegra-i2c.3", NULL),
61 OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL),
62 OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.1", NULL),
63 OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL),
64 {}
65};
66
67static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
68 /* name parent rate enabled */
69 { "uartd", "pll_p", 216000000, true },
70 { NULL, NULL, 0, 0},
71};
72
73static struct of_device_id tegra_dt_match_table[] __initdata = {
74 { .compatible = "simple-bus", },
75 {}
76};
77
78static struct of_device_id tegra_dt_gic_match[] __initdata = {
79 { .compatible = "nvidia,tegra20-gic", },
80 {}
81};
82
83static void __init tegra_dt_init(void)
84{
85 struct device_node *node;
86
87 node = of_find_matching_node_by_address(NULL, tegra_dt_gic_match,
88 TEGRA_ARM_INT_DIST_BASE);
89 if (node)
90 irq_domain_add_simple(node, INT_GIC_BASE);
91
92 tegra_clk_init_from_table(tegra_dt_clk_init_table);
93
94 if (of_machine_is_compatible("nvidia,harmony"))
95 harmony_pinmux_init();
96 else if (of_machine_is_compatible("nvidia,seaboard"))
97 seaboard_pinmux_init();
98
99 /*
100 * Finished with the static registrations now; fill in the missing
101 * devices
102 */
103 of_platform_populate(NULL, tegra_dt_match_table, tegra20_auxdata_lookup, NULL);
104}
105
106static const char * tegra_dt_board_compat[] = {
107 "nvidia,harmony",
108 "nvidia,seaboard",
109 NULL
110};
111
112DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
113 .map_io = tegra_map_common_io,
114 .init_early = tegra_init_early,
115 .init_irq = tegra_init_irq,
116 .timer = &tegra_timer,
117 .init_machine = tegra_dt_init,
118 .dt_compat = tegra_dt_board_compat,
119MACHINE_END