diff options
author | Marc Zyngier <Marc.Zyngier@arm.com> | 2011-12-15 06:19:23 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-12-18 18:00:26 -0500 |
commit | 2f0778afac79bd8d226225556858a636931eeabc (patch) | |
tree | e00cea674f3d6cc8c5584aa5b75239f11f6d229d /arch/arm/mach-tegra/timer.c | |
parent | 3bdc3484e8f2b1b219ad0397d81ce4601fbaf76d (diff) |
ARM: 7205/2: sched_clock: allow sched_clock to be selected at runtime
sched_clock() is yet another blocker on the road to the single
image. This patch implements an idea by Russell King:
http://www.spinics.net/lists/linux-omap/msg49561.html
Instead of asking the platform to implement both sched_clock()
itself and the rollover callback, simply register a read()
function, and let the ARM code care about sched_clock() itself,
the conversion to ns and the rollover. sched_clock() uses
this read() function as an indirection to the platform code.
If the platform doesn't provide a read(), the code falls back
to the jiffy counter (just like the default sched_clock).
This allow some simplifications and possibly some footprint gain
when multiple platforms are compiled in. Among the drawbacks,
the removal of the *_fixed_sched_clock optimization which could
negatively impact some platforms (sa1100, tegra, versatile
and omap).
Tested on 11MPCore, OMAP4 and Tegra.
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Eric Miao <eric.y.miao@gmail.com>
Cc: Colin Cross <ccross@android.com>
Cc: Erik Gilling <konkers@android.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Alessandro Rubini <rubini@unipv.it>
Cc: STEricsson <STEricsson_nomadik_linux@list.st.com>
Cc: Lennert Buytenhek <kernel@wantstofly.org>
Cc: Ben Dooks <ben-linux@fluff.org>
Tested-by: Jamie Iles <jamie@jamieiles.com>
Tested-by: Tony Lindgren <tony@atomide.com>
Tested-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Krzysztof Halasa <khc@pm.waw.pl>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-tegra/timer.c')
-rw-r--r-- | arch/arm/mach-tegra/timer.c | 24 |
1 files changed, 3 insertions, 21 deletions
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c index e2272d263a83..732c724008b1 100644 --- a/arch/arm/mach-tegra/timer.c +++ b/arch/arm/mach-tegra/timer.c | |||
@@ -19,7 +19,6 @@ | |||
19 | 19 | ||
20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
21 | #include <linux/err.h> | 21 | #include <linux/err.h> |
22 | #include <linux/sched.h> | ||
23 | #include <linux/time.h> | 22 | #include <linux/time.h> |
24 | #include <linux/interrupt.h> | 23 | #include <linux/interrupt.h> |
25 | #include <linux/irq.h> | 24 | #include <linux/irq.h> |
@@ -106,25 +105,9 @@ static struct clock_event_device tegra_clockevent = { | |||
106 | .set_mode = tegra_timer_set_mode, | 105 | .set_mode = tegra_timer_set_mode, |
107 | }; | 106 | }; |
108 | 107 | ||
109 | static DEFINE_CLOCK_DATA(cd); | 108 | static u32 notrace tegra_read_sched_clock(void) |
110 | |||
111 | /* | ||
112 | * Constants generated by clocks_calc_mult_shift(m, s, 1MHz, NSEC_PER_SEC, 60). | ||
113 | * This gives a resolution of about 1us and a wrap period of about 1h11min. | ||
114 | */ | ||
115 | #define SC_MULT 4194304000u | ||
116 | #define SC_SHIFT 22 | ||
117 | |||
118 | unsigned long long notrace sched_clock(void) | ||
119 | { | ||
120 | u32 cyc = timer_readl(TIMERUS_CNTR_1US); | ||
121 | return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT); | ||
122 | } | ||
123 | |||
124 | static void notrace tegra_update_sched_clock(void) | ||
125 | { | 109 | { |
126 | u32 cyc = timer_readl(TIMERUS_CNTR_1US); | 110 | return timer_readl(TIMERUS_CNTR_1US); |
127 | update_sched_clock(&cd, cyc, (u32)~0); | ||
128 | } | 111 | } |
129 | 112 | ||
130 | /* | 113 | /* |
@@ -218,8 +201,7 @@ static void __init tegra_init_timer(void) | |||
218 | WARN(1, "Unknown clock rate"); | 201 | WARN(1, "Unknown clock rate"); |
219 | } | 202 | } |
220 | 203 | ||
221 | init_fixed_sched_clock(&cd, tegra_update_sched_clock, 32, | 204 | setup_sched_clock(tegra_read_sched_clock, 32, 1000000); |
222 | 1000000, SC_MULT, SC_SHIFT); | ||
223 | 205 | ||
224 | if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US, | 206 | if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US, |
225 | "timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) { | 207 | "timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) { |