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authorPeter De Schrijver <pdeschrijver@nvidia.com>2011-10-26 04:41:41 -0400
committerOlof Johansson <olof@lixom.net>2011-12-17 23:06:18 -0500
commit2d85b5d8e1f45bc19ba28d6bce2eaae2ca32f9ac (patch)
treeec1e4820d5229c12486a1aab0d058cc765ed84ce /arch/arm/mach-tegra/timer.c
parentd695cfa54e9ec48aeb149cadc8dab1240751572a (diff)
arm/tegra: clk_get should not be fatal
The timer and rtc-timer clocks aren't gated by default, so there is no reason to crash the system if the dummy enable call failed. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-tegra/timer.c')
-rw-r--r--arch/arm/mach-tegra/timer.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c
index e2272d263a83..2f1df471c932 100644
--- a/arch/arm/mach-tegra/timer.c
+++ b/arch/arm/mach-tegra/timer.c
@@ -186,16 +186,20 @@ static void __init tegra_init_timer(void)
186 int ret; 186 int ret;
187 187
188 clk = clk_get_sys("timer", NULL); 188 clk = clk_get_sys("timer", NULL);
189 BUG_ON(IS_ERR(clk)); 189 if (IS_ERR(clk))
190 clk_enable(clk); 190 pr_warn("Unable to get timer clock\n");
191 else
192 clk_enable(clk);
191 193
192 /* 194 /*
193 * rtc registers are used by read_persistent_clock, keep the rtc clock 195 * rtc registers are used by read_persistent_clock, keep the rtc clock
194 * enabled 196 * enabled
195 */ 197 */
196 clk = clk_get_sys("rtc-tegra", NULL); 198 clk = clk_get_sys("rtc-tegra", NULL);
197 BUG_ON(IS_ERR(clk)); 199 if (IS_ERR(clk))
198 clk_enable(clk); 200 pr_warn("Unable to get rtc-tegra clock\n");
201 else
202 clk_enable(clk);
199 203
200#ifdef CONFIG_HAVE_ARM_TWD 204#ifdef CONFIG_HAVE_ARM_TWD
201 twd_base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x600); 205 twd_base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x600);