aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-tegra/reset.h
diff options
context:
space:
mode:
authorPeter De Schrijver <pdeschrijver@nvidia.com>2012-02-09 18:47:45 -0500
committerOlof Johansson <olof@lixom.net>2012-02-26 17:44:44 -0500
commitb36ab9754efbd7429d214b3b03dc9843882571bd (patch)
tree4829030d17f9c03d78b3d065bd04c4c63814c8e1 /arch/arm/mach-tegra/reset.h
parent26fe681fdaa5c800f1f99e8181631866e50ed8a1 (diff)
ARM: tegra: rework Tegra secondary CPU core bringup
Prepare the Tegra secondary CPU core bringup code for other Tegra variants. The reset handler is also generalized to allow for future introduction of powersaving modes which turn off the CPU cores. Based on work by: Scott Williams <scwilliams@nvidia.com> Chris Johnson <cwj@nvidia.com> Colin Cross <ccross@android.com> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-tegra/reset.h')
-rw-r--r--arch/arm/mach-tegra/reset.h50
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/reset.h b/arch/arm/mach-tegra/reset.h
new file mode 100644
index 000000000000..de88bf851dd3
--- /dev/null
+++ b/arch/arm/mach-tegra/reset.h
@@ -0,0 +1,50 @@
1/*
2 * arch/arm/mach-tegra/reset.h
3 *
4 * CPU reset dispatcher.
5 *
6 * Copyright (c) 2011, NVIDIA Corporation.
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#ifndef __MACH_TEGRA_RESET_H
20#define __MACH_TEGRA_RESET_H
21
22#define TEGRA_RESET_MASK_PRESENT 0
23#define TEGRA_RESET_MASK_LP1 1
24#define TEGRA_RESET_MASK_LP2 2
25#define TEGRA_RESET_STARTUP_SECONDARY 3
26#define TEGRA_RESET_STARTUP_LP2 4
27#define TEGRA_RESET_STARTUP_LP1 5
28#define TEGRA_RESET_DATA_SIZE 6
29
30#ifndef __ASSEMBLY__
31
32extern unsigned long __tegra_cpu_reset_handler_data[TEGRA_RESET_DATA_SIZE];
33
34void __tegra_cpu_reset_handler_start(void);
35void __tegra_cpu_reset_handler(void);
36void __tegra_cpu_reset_handler_end(void);
37void tegra_secondary_startup(void);
38
39#define tegra_cpu_reset_handler_offset \
40 ((u32)__tegra_cpu_reset_handler - \
41 (u32)__tegra_cpu_reset_handler_start)
42
43#define tegra_cpu_reset_handler_size \
44 (__tegra_cpu_reset_handler_end - \
45 __tegra_cpu_reset_handler_start)
46
47void __init tegra_cpu_reset_handler_init(void);
48
49#endif
50#endif