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authorPeter De Schrijver <pdeschrijver@nvidia.com>2012-02-09 18:47:49 -0500
committerOlof Johansson <olof@lixom.net>2012-02-26 17:44:45 -0500
commit65fe31da5cede3597938b0f3bba99f604369018d (patch)
treec5a8545f4dcf1f19a4ef0edcf637feb6338d5f6f /arch/arm/mach-tegra/powergate.c
parent6cafa97d3ca6a480dc39e20bb2d12ec2c5ca025e (diff)
ARM: tegra: support for Tegra30 CPU powerdomains
Secondary CPU powerdomains can be powergated on Tegra30. Add the necessary functions to do this. This will be used to boot the secondary CPUs later on. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-tegra/powergate.c')
-rw-r--r--arch/arm/mach-tegra/powergate.c19
1 files changed, 18 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index 7120ad7e1355..c238699ae86f 100644
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -41,6 +41,14 @@
41#define PWRGATE_STATUS 0x38 41#define PWRGATE_STATUS 0x38
42 42
43static int tegra_num_powerdomains; 43static int tegra_num_powerdomains;
44static int tegra_num_cpu_domains;
45static u8 *tegra_cpu_domains;
46static u8 tegra30_cpu_domains[] = {
47 TEGRA_POWERGATE_CPU0,
48 TEGRA_POWERGATE_CPU1,
49 TEGRA_POWERGATE_CPU2,
50 TEGRA_POWERGATE_CPU3,
51};
44 52
45static DEFINE_SPINLOCK(tegra_powergate_lock); 53static DEFINE_SPINLOCK(tegra_powergate_lock);
46 54
@@ -161,6 +169,14 @@ err_power:
161 return ret; 169 return ret;
162} 170}
163 171
172int tegra_cpu_powergate_id(int cpuid)
173{
174 if (cpuid > 0 && cpuid < tegra_num_cpu_domains)
175 return tegra_cpu_domains[cpuid];
176
177 return -EINVAL;
178}
179
164int __init tegra_powergate_init(void) 180int __init tegra_powergate_init(void)
165{ 181{
166 switch (tegra_chip_id) { 182 switch (tegra_chip_id) {
@@ -169,6 +185,8 @@ int __init tegra_powergate_init(void)
169 break; 185 break;
170 case TEGRA30: 186 case TEGRA30:
171 tegra_num_powerdomains = 14; 187 tegra_num_powerdomains = 14;
188 tegra_num_cpu_domains = 4;
189 tegra_cpu_domains = tegra30_cpu_domains;
172 break; 190 break;
173 default: 191 default:
174 /* Unknown Tegra variant. Disable powergating */ 192 /* Unknown Tegra variant. Disable powergating */
@@ -178,7 +196,6 @@ int __init tegra_powergate_init(void)
178 196
179 return 0; 197 return 0;
180} 198}
181arch_initcall(tegra_powergate_init);
182 199
183#ifdef CONFIG_DEBUG_FS 200#ifdef CONFIG_DEBUG_FS
184 201