aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-tegra/pm.c
diff options
context:
space:
mode:
authorJoseph Lo <josephl@nvidia.com>2013-04-03 07:31:28 -0400
committerStephen Warren <swarren@nvidia.com>2013-04-03 16:30:22 -0400
commit0337c3e0c3cbbb3a4f411c292f52fcc314abae67 (patch)
tree73107fcd904db7cab212ce15ed482cc87fe5b36c /arch/arm/mach-tegra/pm.c
parent7021d1220584ab1e6efd3d59da47b65674d9896a (diff)
ARM: tegra: moving the CPU power timer function to PMC driver
The CPU power timer set up function was related to PMC register. Now moving it to PMC driver. And it also help to clean up the PM related code later. The timer was calculated based on the input clock of PMC. In this patch, we also get the clock from DT. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/pm.c')
-rw-r--r--arch/arm/mach-tegra/pm.c37
1 files changed, 1 insertions, 36 deletions
diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c
index 0494f739c95f..5f5611f40b43 100644
--- a/arch/arm/mach-tegra/pm.c
+++ b/arch/arm/mach-tegra/pm.c
@@ -22,7 +22,6 @@
22#include <linux/cpumask.h> 22#include <linux/cpumask.h>
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/cpu_pm.h> 24#include <linux/cpu_pm.h>
25#include <linux/clk.h>
26#include <linux/err.h> 25#include <linux/err.h>
27#include <linux/clk/tegra.h> 26#include <linux/clk/tegra.h>
28 27
@@ -37,52 +36,18 @@
37#include "reset.h" 36#include "reset.h"
38#include "flowctrl.h" 37#include "flowctrl.h"
39#include "fuse.h" 38#include "fuse.h"
39#include "pmc.h"
40#include "sleep.h" 40#include "sleep.h"
41 41
42#define TEGRA_POWER_CPU_PWRREQ_OE (1 << 16) /* CPU pwr req enable */ 42#define TEGRA_POWER_CPU_PWRREQ_OE (1 << 16) /* CPU pwr req enable */
43 43
44#define PMC_CTRL 0x0 44#define PMC_CTRL 0x0
45#define PMC_CPUPWRGOOD_TIMER 0xc8
46#define PMC_CPUPWROFF_TIMER 0xcc
47 45
48#ifdef CONFIG_PM_SLEEP 46#ifdef CONFIG_PM_SLEEP
49static DEFINE_SPINLOCK(tegra_lp2_lock); 47static DEFINE_SPINLOCK(tegra_lp2_lock);
50static void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE); 48static void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
51static struct clk *tegra_pclk;
52void (*tegra_tear_down_cpu)(void); 49void (*tegra_tear_down_cpu)(void);
53 50
54static void set_power_timers(unsigned long us_on, unsigned long us_off)
55{
56 unsigned long long ticks;
57 unsigned long long pclk;
58 unsigned long rate;
59 static unsigned long tegra_last_pclk;
60
61 if (tegra_pclk == NULL) {
62 tegra_pclk = clk_get_sys(NULL, "pclk");
63 WARN_ON(IS_ERR(tegra_pclk));
64 }
65
66 rate = clk_get_rate(tegra_pclk);
67
68 if (WARN_ON_ONCE(rate <= 0))
69 pclk = 100000000;
70 else
71 pclk = rate;
72
73 if ((rate != tegra_last_pclk)) {
74 ticks = (us_on * pclk) + 999999ull;
75 do_div(ticks, 1000000);
76 writel((unsigned long)ticks, pmc + PMC_CPUPWRGOOD_TIMER);
77
78 ticks = (us_off * pclk) + 999999ull;
79 do_div(ticks, 1000000);
80 writel((unsigned long)ticks, pmc + PMC_CPUPWROFF_TIMER);
81 wmb();
82 }
83 tegra_last_pclk = pclk;
84}
85
86/* 51/*
87 * restore_cpu_complex 52 * restore_cpu_complex
88 * 53 *