diff options
author | Stephen Warren <swarren@nvidia.com> | 2013-01-28 13:22:46 -0500 |
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committer | Stephen Warren <swarren@nvidia.com> | 2013-01-28 13:22:46 -0500 |
commit | ee059485175b21079d3639f167980d354afb3d4b (patch) | |
tree | 30bf32ec57ba915d31348c1b603481baf42c81dd /arch/arm/mach-tegra/platsmp.c | |
parent | 1d328606c66b9bb1c0552f585943d596f37ae3b9 (diff) | |
parent | 80d9375617f7544f7475e7f07003a08930559d43 (diff) |
Merge branch 'for-3.9/scu-base-rework' into for-3.9/soc-t114
Conflicts:
arch/arm/mach-tegra/platsmp.c
Diffstat (limited to 'arch/arm/mach-tegra/platsmp.c')
-rw-r--r-- | arch/arm/mach-tegra/platsmp.c | 19 |
1 files changed, 2 insertions, 17 deletions
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c index 3ec7fc487857..2ff68a47099d 100644 --- a/arch/arm/mach-tegra/platsmp.c +++ b/arch/arm/mach-tegra/platsmp.c | |||
@@ -38,7 +38,6 @@ | |||
38 | extern void tegra_secondary_startup(void); | 38 | extern void tegra_secondary_startup(void); |
39 | 39 | ||
40 | static cpumask_t tegra_cpu_init_mask; | 40 | static cpumask_t tegra_cpu_init_mask; |
41 | static void __iomem *scu_base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE); | ||
42 | 41 | ||
43 | #define EVP_CPU_RESET_VECTOR \ | 42 | #define EVP_CPU_RESET_VECTOR \ |
44 | (IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE) + 0x100) | 43 | (IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE) + 0x100) |
@@ -177,23 +176,8 @@ done: | |||
177 | return status; | 176 | return status; |
178 | } | 177 | } |
179 | 178 | ||
180 | /* | ||
181 | * Initialise the CPU possible map early - this describes the CPUs | ||
182 | * which may be present or become present in the system. | ||
183 | */ | ||
184 | static void __init tegra_smp_init_cpus(void) | 179 | static void __init tegra_smp_init_cpus(void) |
185 | { | 180 | { |
186 | unsigned int i, ncores = scu_get_core_count(scu_base); | ||
187 | |||
188 | if (ncores > nr_cpu_ids) { | ||
189 | pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", | ||
190 | ncores, nr_cpu_ids); | ||
191 | ncores = nr_cpu_ids; | ||
192 | } | ||
193 | |||
194 | for (i = 0; i < ncores; i++) | ||
195 | set_cpu_possible(i, true); | ||
196 | |||
197 | set_smp_cross_call(gic_raise_softirq); | 181 | set_smp_cross_call(gic_raise_softirq); |
198 | } | 182 | } |
199 | 183 | ||
@@ -202,7 +186,8 @@ static void __init tegra_smp_prepare_cpus(unsigned int max_cpus) | |||
202 | /* Always mark the boot CPU (CPU0) as initialized. */ | 186 | /* Always mark the boot CPU (CPU0) as initialized. */ |
203 | cpumask_set_cpu(0, &tegra_cpu_init_mask); | 187 | cpumask_set_cpu(0, &tegra_cpu_init_mask); |
204 | 188 | ||
205 | scu_enable(scu_base); | 189 | if (scu_a9_has_base()) |
190 | scu_enable(IO_ADDRESS(scu_a9_get_base())); | ||
206 | } | 191 | } |
207 | 192 | ||
208 | struct smp_operations tegra_smp_ops __initdata = { | 193 | struct smp_operations tegra_smp_ops __initdata = { |