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author | Arnd Bergmann <arnd@arndb.de> | 2011-10-20 12:15:30 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2011-10-20 12:15:30 -0400 |
commit | 107532920226a37e595697959b2a6a823cfa2497 (patch) | |
tree | 7d35c84ed324e6cabeed29282f1fc97994fd204b /arch/arm/mach-tegra/pinmux-t2-tables.c | |
parent | 29ea35969b92a4be122a58c4aceea8c5e2c388d9 (diff) | |
parent | ecb7b0e33e048e63d1169e6fee277430c70ddf0b (diff) |
Merge branch 'tegra/devel' into next/devel
Diffstat (limited to 'arch/arm/mach-tegra/pinmux-t2-tables.c')
-rw-r--r-- | arch/arm/mach-tegra/pinmux-t2-tables.c | 76 |
1 files changed, 13 insertions, 63 deletions
diff --git a/arch/arm/mach-tegra/pinmux-t2-tables.c b/arch/arm/mach-tegra/pinmux-t2-tables.c index a475367befa3..a0dc2bc28ed3 100644 --- a/arch/arm/mach-tegra/pinmux-t2-tables.c +++ b/arch/arm/mach-tegra/pinmux-t2-tables.c | |||
@@ -31,10 +31,16 @@ | |||
31 | #include <mach/pinmux.h> | 31 | #include <mach/pinmux.h> |
32 | #include <mach/suspend.h> | 32 | #include <mach/suspend.h> |
33 | 33 | ||
34 | #define TRISTATE_REG_A 0x14 | ||
35 | #define PIN_MUX_CTL_REG_A 0x80 | ||
36 | #define PULLUPDOWN_REG_A 0xa0 | ||
37 | #define PINGROUP_REG_A 0x868 | ||
38 | |||
34 | #define DRIVE_PINGROUP(pg_name, r) \ | 39 | #define DRIVE_PINGROUP(pg_name, r) \ |
35 | [TEGRA_DRIVE_PINGROUP_ ## pg_name] = { \ | 40 | [TEGRA_DRIVE_PINGROUP_ ## pg_name] = { \ |
36 | .name = #pg_name, \ | 41 | .name = #pg_name, \ |
37 | .reg = r \ | 42 | .reg_bank = 3, \ |
43 | .reg = ((r) - PINGROUP_REG_A) \ | ||
38 | } | 44 | } |
39 | 45 | ||
40 | const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE_PINGROUP] = { | 46 | const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE_PINGROUP] = { |
@@ -90,11 +96,14 @@ const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE | |||
90 | TEGRA_MUX_ ## f3, \ | 96 | TEGRA_MUX_ ## f3, \ |
91 | }, \ | 97 | }, \ |
92 | .func_safe = TEGRA_MUX_ ## f_safe, \ | 98 | .func_safe = TEGRA_MUX_ ## f_safe, \ |
93 | .tri_reg = tri_r, \ | 99 | .tri_bank = 0, \ |
100 | .tri_reg = ((tri_r) - TRISTATE_REG_A), \ | ||
94 | .tri_bit = tri_b, \ | 101 | .tri_bit = tri_b, \ |
95 | .mux_reg = mux_r, \ | 102 | .mux_bank = 1, \ |
103 | .mux_reg = ((mux_r) - PIN_MUX_CTL_REG_A), \ | ||
96 | .mux_bit = mux_b, \ | 104 | .mux_bit = mux_b, \ |
97 | .pupd_reg = pupd_r, \ | 105 | .pupd_bank = 2, \ |
106 | .pupd_reg = ((pupd_r) - PULLUPDOWN_REG_A), \ | ||
98 | .pupd_bit = pupd_b, \ | 107 | .pupd_bit = pupd_b, \ |
99 | } | 108 | } |
100 | 109 | ||
@@ -217,62 +226,3 @@ const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] = { | |||
217 | PINGROUP(XM2C, DDR, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xA8, 30), | 226 | PINGROUP(XM2C, DDR, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xA8, 30), |
218 | PINGROUP(XM2D, DDR, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xA8, 28), | 227 | PINGROUP(XM2D, DDR, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xA8, 28), |
219 | }; | 228 | }; |
220 | |||
221 | #ifdef CONFIG_PM | ||
222 | #define TRISTATE_REG_A 0x14 | ||
223 | #define TRISTATE_REG_NUM 4 | ||
224 | #define PIN_MUX_CTL_REG_A 0x80 | ||
225 | #define PIN_MUX_CTL_REG_NUM 8 | ||
226 | #define PULLUPDOWN_REG_A 0xa0 | ||
227 | #define PULLUPDOWN_REG_NUM 5 | ||
228 | |||
229 | static u32 pinmux_reg[TRISTATE_REG_NUM + PIN_MUX_CTL_REG_NUM + | ||
230 | PULLUPDOWN_REG_NUM + | ||
231 | ARRAY_SIZE(tegra_soc_drive_pingroups)]; | ||
232 | |||
233 | static inline unsigned long pg_readl(unsigned long offset) | ||
234 | { | ||
235 | return readl(IO_TO_VIRT(TEGRA_APB_MISC_BASE + offset)); | ||
236 | } | ||
237 | |||
238 | static inline void pg_writel(unsigned long value, unsigned long offset) | ||
239 | { | ||
240 | writel(value, IO_TO_VIRT(TEGRA_APB_MISC_BASE + offset)); | ||
241 | } | ||
242 | |||
243 | void tegra_pinmux_suspend(void) | ||
244 | { | ||
245 | unsigned int i; | ||
246 | u32 *ctx = pinmux_reg; | ||
247 | |||
248 | for (i = 0; i < PIN_MUX_CTL_REG_NUM; i++) | ||
249 | *ctx++ = pg_readl(PIN_MUX_CTL_REG_A + i*4); | ||
250 | |||
251 | for (i = 0; i < PULLUPDOWN_REG_NUM; i++) | ||
252 | *ctx++ = pg_readl(PULLUPDOWN_REG_A + i*4); | ||
253 | |||
254 | for (i = 0; i < TRISTATE_REG_NUM; i++) | ||
255 | *ctx++ = pg_readl(TRISTATE_REG_A + i*4); | ||
256 | |||
257 | for (i = 0; i < ARRAY_SIZE(tegra_soc_drive_pingroups); i++) | ||
258 | *ctx++ = pg_readl(tegra_soc_drive_pingroups[i].reg); | ||
259 | } | ||
260 | |||
261 | void tegra_pinmux_resume(void) | ||
262 | { | ||
263 | unsigned int i; | ||
264 | u32 *ctx = pinmux_reg; | ||
265 | |||
266 | for (i = 0; i < PIN_MUX_CTL_REG_NUM; i++) | ||
267 | pg_writel(*ctx++, PIN_MUX_CTL_REG_A + i*4); | ||
268 | |||
269 | for (i = 0; i < PULLUPDOWN_REG_NUM; i++) | ||
270 | pg_writel(*ctx++, PULLUPDOWN_REG_A + i*4); | ||
271 | |||
272 | for (i = 0; i < TRISTATE_REG_NUM; i++) | ||
273 | pg_writel(*ctx++, TRISTATE_REG_A + i*4); | ||
274 | |||
275 | for (i = 0; i < ARRAY_SIZE(tegra_soc_drive_pingroups); i++) | ||
276 | pg_writel(*ctx++, tegra_soc_drive_pingroups[i].reg); | ||
277 | } | ||
278 | #endif | ||