diff options
author | Gary King <gking@nvidia.com> | 2010-08-18 03:19:58 -0400 |
---|---|---|
committer | Colin Cross <ccross@android.com> | 2011-02-10 00:57:02 -0500 |
commit | 3c3895b4bf58d709ad4709480ceb2bb006741972 (patch) | |
tree | 00c31254e4f5c94e057aebb85b50e38761866315 /arch/arm/mach-tegra/pinmux-t2-tables.c | |
parent | cea62c878dd8b73b67fb3e38f989e9d3241d5934 (diff) |
ARM: tegra: pinmux: Add missing drive pingroups and fix suspend
Adds missing drive pingroups, saves all drive pingroups in
suspend, and restores the pinmux registers in the proper order.
Signed-off-by: Gary King <gking@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
Diffstat (limited to 'arch/arm/mach-tegra/pinmux-t2-tables.c')
-rw-r--r-- | arch/arm/mach-tegra/pinmux-t2-tables.c | 25 |
1 files changed, 21 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/pinmux-t2-tables.c b/arch/arm/mach-tegra/pinmux-t2-tables.c index 4d97d5c86ac3..a475367befa3 100644 --- a/arch/arm/mach-tegra/pinmux-t2-tables.c +++ b/arch/arm/mach-tegra/pinmux-t2-tables.c | |||
@@ -66,6 +66,16 @@ const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE | |||
66 | DRIVE_PINGROUP(XM2D, 0x8cc), | 66 | DRIVE_PINGROUP(XM2D, 0x8cc), |
67 | DRIVE_PINGROUP(XM2CLK, 0x8d0), | 67 | DRIVE_PINGROUP(XM2CLK, 0x8d0), |
68 | DRIVE_PINGROUP(MEMCOMP, 0x8d4), | 68 | DRIVE_PINGROUP(MEMCOMP, 0x8d4), |
69 | DRIVE_PINGROUP(SDIO1, 0x8e0), | ||
70 | DRIVE_PINGROUP(CRT, 0x8ec), | ||
71 | DRIVE_PINGROUP(DDC, 0x8f0), | ||
72 | DRIVE_PINGROUP(GMA, 0x8f4), | ||
73 | DRIVE_PINGROUP(GMB, 0x8f8), | ||
74 | DRIVE_PINGROUP(GMC, 0x8fc), | ||
75 | DRIVE_PINGROUP(GMD, 0x900), | ||
76 | DRIVE_PINGROUP(GME, 0x904), | ||
77 | DRIVE_PINGROUP(OWR, 0x908), | ||
78 | DRIVE_PINGROUP(UAD, 0x90c), | ||
69 | }; | 79 | }; |
70 | 80 | ||
71 | #define PINGROUP(pg_name, vdd, f0, f1, f2, f3, f_safe, \ | 81 | #define PINGROUP(pg_name, vdd, f0, f1, f2, f3, f_safe, \ |
@@ -217,7 +227,8 @@ const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] = { | |||
217 | #define PULLUPDOWN_REG_NUM 5 | 227 | #define PULLUPDOWN_REG_NUM 5 |
218 | 228 | ||
219 | static u32 pinmux_reg[TRISTATE_REG_NUM + PIN_MUX_CTL_REG_NUM + | 229 | static u32 pinmux_reg[TRISTATE_REG_NUM + PIN_MUX_CTL_REG_NUM + |
220 | PULLUPDOWN_REG_NUM]; | 230 | PULLUPDOWN_REG_NUM + |
231 | ARRAY_SIZE(tegra_soc_drive_pingroups)]; | ||
221 | 232 | ||
222 | static inline unsigned long pg_readl(unsigned long offset) | 233 | static inline unsigned long pg_readl(unsigned long offset) |
223 | { | 234 | { |
@@ -234,14 +245,17 @@ void tegra_pinmux_suspend(void) | |||
234 | unsigned int i; | 245 | unsigned int i; |
235 | u32 *ctx = pinmux_reg; | 246 | u32 *ctx = pinmux_reg; |
236 | 247 | ||
237 | for (i = 0; i < TRISTATE_REG_NUM; i++) | ||
238 | *ctx++ = pg_readl(TRISTATE_REG_A + i*4); | ||
239 | |||
240 | for (i = 0; i < PIN_MUX_CTL_REG_NUM; i++) | 248 | for (i = 0; i < PIN_MUX_CTL_REG_NUM; i++) |
241 | *ctx++ = pg_readl(PIN_MUX_CTL_REG_A + i*4); | 249 | *ctx++ = pg_readl(PIN_MUX_CTL_REG_A + i*4); |
242 | 250 | ||
243 | for (i = 0; i < PULLUPDOWN_REG_NUM; i++) | 251 | for (i = 0; i < PULLUPDOWN_REG_NUM; i++) |
244 | *ctx++ = pg_readl(PULLUPDOWN_REG_A + i*4); | 252 | *ctx++ = pg_readl(PULLUPDOWN_REG_A + i*4); |
253 | |||
254 | for (i = 0; i < TRISTATE_REG_NUM; i++) | ||
255 | *ctx++ = pg_readl(TRISTATE_REG_A + i*4); | ||
256 | |||
257 | for (i = 0; i < ARRAY_SIZE(tegra_soc_drive_pingroups); i++) | ||
258 | *ctx++ = pg_readl(tegra_soc_drive_pingroups[i].reg); | ||
245 | } | 259 | } |
246 | 260 | ||
247 | void tegra_pinmux_resume(void) | 261 | void tegra_pinmux_resume(void) |
@@ -257,5 +271,8 @@ void tegra_pinmux_resume(void) | |||
257 | 271 | ||
258 | for (i = 0; i < TRISTATE_REG_NUM; i++) | 272 | for (i = 0; i < TRISTATE_REG_NUM; i++) |
259 | pg_writel(*ctx++, TRISTATE_REG_A + i*4); | 273 | pg_writel(*ctx++, TRISTATE_REG_A + i*4); |
274 | |||
275 | for (i = 0; i < ARRAY_SIZE(tegra_soc_drive_pingroups); i++) | ||
276 | pg_writel(*ctx++, tegra_soc_drive_pingroups[i].reg); | ||
260 | } | 277 | } |
261 | #endif | 278 | #endif |