diff options
author | Colin Cross <ccross@android.com> | 2011-02-10 01:17:17 -0500 |
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committer | Colin Cross <ccross@android.com> | 2011-02-10 01:18:30 -0500 |
commit | 26d902c0c6d6254f471663305d48b63f027ddb0c (patch) | |
tree | 70cd9d540a6e9ab7b54d98cb4f89b00f34e0772a /arch/arm/mach-tegra/irq.c | |
parent | 3524b70ef3336a4f1351a489e83894b88106ab7c (diff) |
ARM: tegra: irq: Implement retrigger
Signed-off-by: Colin Cross <ccross@android.com>
Diffstat (limited to 'arch/arm/mach-tegra/irq.c')
-rw-r--r-- | arch/arm/mach-tegra/irq.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c index 7fb73490eb55..dfbc219ea492 100644 --- a/arch/arm/mach-tegra/irq.c +++ b/arch/arm/mach-tegra/irq.c | |||
@@ -48,6 +48,7 @@ static u32 tegra_lp0_wake_level_any; | |||
48 | 48 | ||
49 | static void (*tegra_gic_mask_irq)(struct irq_data *d); | 49 | static void (*tegra_gic_mask_irq)(struct irq_data *d); |
50 | static void (*tegra_gic_unmask_irq)(struct irq_data *d); | 50 | static void (*tegra_gic_unmask_irq)(struct irq_data *d); |
51 | static void (*tegra_gic_ack_irq)(struct irq_data *d); | ||
51 | 52 | ||
52 | /* ensures that sufficient time is passed for a register write to | 53 | /* ensures that sufficient time is passed for a register write to |
53 | * serialize into the 32KHz domain */ | 54 | * serialize into the 32KHz domain */ |
@@ -112,10 +113,24 @@ static void tegra_unmask(struct irq_data *d) | |||
112 | tegra_legacy_unmask_irq(d->irq); | 113 | tegra_legacy_unmask_irq(d->irq); |
113 | } | 114 | } |
114 | 115 | ||
116 | static void tegra_ack(struct irq_data *d) | ||
117 | { | ||
118 | tegra_legacy_force_irq_clr(d->irq); | ||
119 | tegra_gic_ack_irq(d); | ||
120 | } | ||
121 | |||
122 | static int tegra_retrigger(struct irq_data *d) | ||
123 | { | ||
124 | tegra_legacy_force_irq_set(d->irq); | ||
125 | return 1; | ||
126 | } | ||
127 | |||
115 | static struct irq_chip tegra_irq = { | 128 | static struct irq_chip tegra_irq = { |
116 | .name = "PPI", | 129 | .name = "PPI", |
130 | .irq_ack = tegra_ack, | ||
117 | .irq_mask = tegra_mask, | 131 | .irq_mask = tegra_mask, |
118 | .irq_unmask = tegra_unmask, | 132 | .irq_unmask = tegra_unmask, |
133 | .irq_retrigger = tegra_retrigger, | ||
119 | }; | 134 | }; |
120 | 135 | ||
121 | void __init tegra_init_irq(void) | 136 | void __init tegra_init_irq(void) |
@@ -132,7 +147,7 @@ void __init tegra_init_irq(void) | |||
132 | gic = get_irq_chip(29); | 147 | gic = get_irq_chip(29); |
133 | tegra_gic_unmask_irq = gic->irq_unmask; | 148 | tegra_gic_unmask_irq = gic->irq_unmask; |
134 | tegra_gic_mask_irq = gic->irq_mask; | 149 | tegra_gic_mask_irq = gic->irq_mask; |
135 | tegra_irq.irq_ack = gic->irq_ack; | 150 | tegra_gic_ack_irq = gic->irq_ack; |
136 | #ifdef CONFIG_SMP | 151 | #ifdef CONFIG_SMP |
137 | tegra_irq.irq_set_affinity = gic->irq_set_affinity; | 152 | tegra_irq.irq_set_affinity = gic->irq_set_affinity; |
138 | #endif | 153 | #endif |