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authorColin Cross <ccross@android.com>2010-05-24 20:07:46 -0400
committerColin Cross <ccross@android.com>2011-02-10 00:57:00 -0500
commitce1e32626951957729d5a1bbe3fa7e5d734df6c0 (patch)
treeafec71f9d21903a06b94207b06da4d660cbd52c1 /arch/arm/mach-tegra/include/mach/powergate.h
parentd377eb0d95e4a7333afeb5ca4ba8554160480263 (diff)
ARM: tegra: Add api to control internal powergating
Signed-off-by: Colin Cross <ccross@android.com>
Diffstat (limited to 'arch/arm/mach-tegra/include/mach/powergate.h')
-rw-r--r--arch/arm/mach-tegra/include/mach/powergate.h40
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/include/mach/powergate.h b/arch/arm/mach-tegra/include/mach/powergate.h
new file mode 100644
index 000000000000..401d1b725291
--- /dev/null
+++ b/arch/arm/mach-tegra/include/mach/powergate.h
@@ -0,0 +1,40 @@
1/*
2 * drivers/regulator/tegra-regulator.c
3 *
4 * Copyright (c) 2010 Google, Inc
5 *
6 * Author:
7 * Colin Cross <ccross@google.com>
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20#ifndef _MACH_TEGRA_POWERGATE_H_
21#define _MACH_TEGRA_POWERGATE_H_
22
23#define TEGRA_POWERGATE_CPU 0
24#define TEGRA_POWERGATE_3D 1
25#define TEGRA_POWERGATE_VENC 2
26#define TEGRA_POWERGATE_PCIE 3
27#define TEGRA_POWERGATE_VDEC 4
28#define TEGRA_POWERGATE_L2 5
29#define TEGRA_POWERGATE_MPE 6
30#define TEGRA_NUM_POWERGATE 7
31
32int tegra_powergate_power_on(int id);
33int tegra_powergate_power_off(int id);
34bool tegra_powergate_is_powered(int id);
35int tegra_powergate_remove_clamping(int id);
36
37/* Must be called with clk disabled, and returns with clk enabled */
38int tegra_powergate_sequence_power_up(int id, struct clk *clk);
39
40#endif /* _MACH_TEGRA_POWERGATE_H_ */