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authorOlof Johansson <olof@lixom.net>2011-10-13 03:14:08 -0400
committerOlof Johansson <olof@lixom.net>2012-02-06 21:24:58 -0500
commitd262f49d10554ae2908e6d1d0e93fa736c4c0d06 (patch)
tree61bf4eb39e0abc637cd9da3f8fd5bd07239647fa /arch/arm/mach-tegra/fuse.c
parente2f91578b35347341482f6af9e4fcf3174531efd (diff)
ARM: tegra: fuse: use apbio dma for register access
Use the apbio dma functions for accessing the fuse registers. Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-tegra/fuse.c')
-rw-r--r--arch/arm/mach-tegra/fuse.c20
1 files changed, 8 insertions, 12 deletions
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c
index 1fa26d9a1a68..daf3f572acc8 100644
--- a/arch/arm/mach-tegra/fuse.c
+++ b/arch/arm/mach-tegra/fuse.c
@@ -23,20 +23,16 @@
23#include <mach/iomap.h> 23#include <mach/iomap.h>
24 24
25#include "fuse.h" 25#include "fuse.h"
26#include "apbio.h"
26 27
27#define FUSE_UID_LOW 0x108 28#define FUSE_UID_LOW 0x108
28#define FUSE_UID_HIGH 0x10c 29#define FUSE_UID_HIGH 0x10c
29#define FUSE_SKU_INFO 0x110 30#define FUSE_SKU_INFO 0x110
30#define FUSE_SPARE_BIT 0x200 31#define FUSE_SPARE_BIT 0x200
31 32
32static inline u32 fuse_readl(unsigned long offset) 33static inline u32 tegra_fuse_readl(unsigned long offset)
33{ 34{
34 return readl(IO_TO_VIRT(TEGRA_FUSE_BASE + offset)); 35 return tegra_apb_readl(TEGRA_FUSE_BASE + offset);
35}
36
37static inline void fuse_writel(u32 value, unsigned long offset)
38{
39 writel(value, IO_TO_VIRT(TEGRA_FUSE_BASE + offset));
40} 36}
41 37
42void tegra_init_fuse(void) 38void tegra_init_fuse(void)
@@ -54,15 +50,15 @@ unsigned long long tegra_chip_uid(void)
54{ 50{
55 unsigned long long lo, hi; 51 unsigned long long lo, hi;
56 52
57 lo = fuse_readl(FUSE_UID_LOW); 53 lo = tegra_fuse_readl(FUSE_UID_LOW);
58 hi = fuse_readl(FUSE_UID_HIGH); 54 hi = tegra_fuse_readl(FUSE_UID_HIGH);
59 return (hi << 32ull) | lo; 55 return (hi << 32ull) | lo;
60} 56}
61 57
62int tegra_sku_id(void) 58int tegra_sku_id(void)
63{ 59{
64 int sku_id; 60 int sku_id;
65 u32 reg = fuse_readl(FUSE_SKU_INFO); 61 u32 reg = tegra_fuse_readl(FUSE_SKU_INFO);
66 sku_id = reg & 0xFF; 62 sku_id = reg & 0xFF;
67 return sku_id; 63 return sku_id;
68} 64}
@@ -70,7 +66,7 @@ int tegra_sku_id(void)
70int tegra_cpu_process_id(void) 66int tegra_cpu_process_id(void)
71{ 67{
72 int cpu_process_id; 68 int cpu_process_id;
73 u32 reg = fuse_readl(FUSE_SPARE_BIT); 69 u32 reg = tegra_fuse_readl(FUSE_SPARE_BIT);
74 cpu_process_id = (reg >> 6) & 3; 70 cpu_process_id = (reg >> 6) & 3;
75 return cpu_process_id; 71 return cpu_process_id;
76} 72}
@@ -78,7 +74,7 @@ int tegra_cpu_process_id(void)
78int tegra_core_process_id(void) 74int tegra_core_process_id(void)
79{ 75{
80 int core_process_id; 76 int core_process_id;
81 u32 reg = fuse_readl(FUSE_SPARE_BIT); 77 u32 reg = tegra_fuse_readl(FUSE_SPARE_BIT);
82 core_process_id = (reg >> 12) & 3; 78 core_process_id = (reg >> 12) & 3;
83 return core_process_id; 79 return core_process_id;
84} 80}