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authorJoseph Lo <josephl@nvidia.com>2012-10-31 05:41:20 -0400
committerStephen Warren <swarren@nvidia.com>2012-11-15 17:09:21 -0500
commit01459c69dd48badeb7833c3293e43f7b8ae75e31 (patch)
tree4ebe32a49b2b81560c8fb5fc94c9937360f16618 /arch/arm/mach-tegra/flowctrl.h
parenta6e293eef2eafc31dbe008301182e7124bd87755 (diff)
ARM: tegra30: flowctrl: add cpu_suspend_exter/exit function
The flow controller can help CPU to go into suspend mode (powered-down state). When CPU go into powered-down state, it needs some careful settings before getting into and after leaving. The enter and exit functions do that by configuring appropriate mode for flow controller. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/flowctrl.h')
-rw-r--r--arch/arm/mach-tegra/flowctrl.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/flowctrl.h b/arch/arm/mach-tegra/flowctrl.h
index 19428173855e..0798dec1832d 100644
--- a/arch/arm/mach-tegra/flowctrl.h
+++ b/arch/arm/mach-tegra/flowctrl.h
@@ -34,9 +34,17 @@
34#define FLOW_CTRL_HALT_CPU1_EVENTS 0x14 34#define FLOW_CTRL_HALT_CPU1_EVENTS 0x14
35#define FLOW_CTRL_CPU1_CSR 0x18 35#define FLOW_CTRL_CPU1_CSR 0x18
36 36
37#define TEGRA30_FLOW_CTRL_CSR_WFI_CPU0 (1 << 8)
38#define TEGRA30_FLOW_CTRL_CSR_WFE_BITMAP (0xF << 4)
39#define TEGRA30_FLOW_CTRL_CSR_WFI_BITMAP (0xF << 8)
40
37#ifndef __ASSEMBLY__ 41#ifndef __ASSEMBLY__
42u32 flowctrl_read_cpu_csr(unsigned int cpuid);
38void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value); 43void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value);
39void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value); 44void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value);
45
46void flowctrl_cpu_suspend_enter(unsigned int cpuid);
47void flowctrl_cpu_suspend_exit(unsigned int cpuid);
40#endif 48#endif
41 49
42#endif 50#endif