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authorPrashant Gaikwad <pgaikwad@nvidia.com>2012-08-06 02:27:44 -0400
committerStephen Warren <swarren@nvidia.com>2012-09-06 13:47:20 -0400
commit1dfacc1613d088a99ac0360f6e276cad7f7cdf0c (patch)
tree97bbfcbc63727db88da71e7e2626efc5abcd81b8 /arch/arm/mach-tegra/clock.h
parent92fe58f07f6e51185497785aed632d0e676afe6e (diff)
ARM: tegra: Remove duplicate code
Remove Tegra legacy clock framework code. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/clock.h')
-rw-r--r--arch/arm/mach-tegra/clock.h89
1 files changed, 0 insertions, 89 deletions
diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h
index be69ae1156c2..2aa37f5c44c0 100644
--- a/arch/arm/mach-tegra/clock.h
+++ b/arch/arm/mach-tegra/clock.h
@@ -24,7 +24,6 @@
24#include <linux/clk-provider.h> 24#include <linux/clk-provider.h>
25#include <linux/clkdev.h> 25#include <linux/clkdev.h>
26#include <linux/list.h> 26#include <linux/list.h>
27#include <linux/spinlock.h>
28 27
29#include <mach/clk.h> 28#include <mach/clk.h>
30 29
@@ -54,12 +53,8 @@
54#define ENABLE_ON_INIT (1 << 28) 53#define ENABLE_ON_INIT (1 << 28)
55#define PERIPH_ON_APB (1 << 29) 54#define PERIPH_ON_APB (1 << 29)
56 55
57struct clk;
58
59#ifdef CONFIG_COMMON_CLK
60struct clk_tegra; 56struct clk_tegra;
61#define to_clk_tegra(_hw) container_of(_hw, struct clk_tegra, hw) 57#define to_clk_tegra(_hw) container_of(_hw, struct clk_tegra, hw)
62#endif
63 58
64struct clk_mux_sel { 59struct clk_mux_sel {
65 struct clk *input; 60 struct clk *input;
@@ -81,82 +76,6 @@ enum clk_state {
81 OFF, 76 OFF,
82}; 77};
83 78
84#ifndef CONFIG_COMMON_CLK
85struct clk_ops {
86 void (*init)(struct clk *);
87 int (*enable)(struct clk *);
88 void (*disable)(struct clk *);
89 int (*set_parent)(struct clk *, struct clk *);
90 int (*set_rate)(struct clk *, unsigned long);
91 long (*round_rate)(struct clk *, unsigned long);
92 void (*reset)(struct clk *, bool);
93 int (*clk_cfg_ex)(struct clk *,
94 enum tegra_clk_ex_param, u32);
95};
96
97struct clk {
98 /* node for master clocks list */
99 struct list_head node; /* node for list of all clocks */
100 struct clk_lookup lookup;
101
102#ifdef CONFIG_DEBUG_FS
103 struct dentry *dent;
104#endif
105 bool set;
106 struct clk_ops *ops;
107 unsigned long rate;
108 unsigned long max_rate;
109 unsigned long min_rate;
110 u32 flags;
111 const char *name;
112
113 u32 refcnt;
114 enum clk_state state;
115 struct clk *parent;
116 u32 div;
117 u32 mul;
118
119 const struct clk_mux_sel *inputs;
120 u32 reg;
121 u32 reg_shift;
122
123 struct list_head shared_bus_list;
124
125 union {
126 struct {
127 unsigned int clk_num;
128 } periph;
129 struct {
130 unsigned long input_min;
131 unsigned long input_max;
132 unsigned long cf_min;
133 unsigned long cf_max;
134 unsigned long vco_min;
135 unsigned long vco_max;
136 const struct clk_pll_freq_table *freq_table;
137 int lock_delay;
138 unsigned long fixed_rate;
139 } pll;
140 struct {
141 u32 sel;
142 u32 reg_mask;
143 } mux;
144 struct {
145 struct clk *main;
146 struct clk *backup;
147 } cpu;
148 struct {
149 struct list_head node;
150 bool enabled;
151 unsigned long rate;
152 } shared_bus_user;
153 } u;
154
155 spinlock_t spinlock;
156};
157
158#else
159
160struct clk_tegra { 79struct clk_tegra {
161 /* node for master clocks list */ 80 /* node for master clocks list */
162 struct list_head node; /* node for list of all clocks */ 81 struct list_head node; /* node for list of all clocks */
@@ -212,7 +131,6 @@ struct clk_tegra {
212 void (*reset)(struct clk_hw *, bool); 131 void (*reset)(struct clk_hw *, bool);
213 int (*clk_cfg_ex)(struct clk_hw *, enum tegra_clk_ex_param, u32); 132 int (*clk_cfg_ex)(struct clk_hw *, enum tegra_clk_ex_param, u32);
214}; 133};
215#endif /* !CONFIG_COMMON_CLK */
216 134
217struct clk_duplicate { 135struct clk_duplicate {
218 const char *name; 136 const char *name;
@@ -226,13 +144,6 @@ struct tegra_clk_init_table {
226 bool enabled; 144 bool enabled;
227}; 145};
228 146
229#ifndef CONFIG_COMMON_CLK
230void clk_init(struct clk *clk);
231unsigned long clk_get_rate_locked(struct clk *c);
232int clk_set_rate_locked(struct clk *c, unsigned long rate);
233int clk_reparent(struct clk *c, struct clk *parent);
234#endif /* !CONFIG_COMMON_CLK */
235
236void tegra_clk_add(struct clk *c); 147void tegra_clk_add(struct clk *c);
237void tegra2_init_clocks(void); 148void tegra2_init_clocks(void);
238void tegra30_init_clocks(void); 149void tegra30_init_clocks(void);