ARM: Tegra: Force PORT_TEGRA as the UART type

8250.c recently gained an explicit PORT_TEGRA port type. Specifically
request this in all Tegra boards' UART platform data.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

1 files changed, 4 insertions, 2 deletions

diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
index 51d847f7fca9..7630c239e7a9 100644
--- a/arch/arm/mach-tegra/board-paz00.c
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -50,7 +50,8 @@ static struct plat_serial8250_port debug_uart_platform_data[] = {
                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
                 .mapbase        = TEGRA_UARTA_BASE,
                 .irq            = INT_UARTA,
-                .flags          = UPF_BOOT_AUTOCONF,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
+                .type           = PORT_TEGRA,
                 .iotype         = UPIO_MEM,
                 .regshift       = 2,
                 .uartclk        = 216000000,
@@ -59,7 +60,8 @@ static struct plat_serial8250_port debug_uart_platform_data[] = {
                 .membase        = IO_ADDRESS(TEGRA_UARTD_BASE),
                 .mapbase        = TEGRA_UARTD_BASE,
                 .irq            = INT_UARTD,
-                .flags          = UPF_BOOT_AUTOCONF,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
+                .type           = PORT_TEGRA,
                 .iotype         = UPIO_MEM,
                 .regshift       = 2,
                 .uartclk        = 216000000,