diff options
author | Rob Herring <rob.herring@calxeda.com> | 2012-09-06 14:32:38 -0400 |
---|---|---|
committer | Rob Herring <rob.herring@calxeda.com> | 2012-09-14 10:22:04 -0400 |
commit | 360a0cab50414ee30924917159066e69ee4b38d3 (patch) | |
tree | ba2056a50e3e42cd3921c0a007640b85c38b3ffd /arch/arm/mach-tegra/Makefile.boot | |
parent | 59bba2a9854a2de869440ff799d8e3dfd4779543 (diff) |
ARM: move all dtb targets out of Makefile.boot
In preparation to support multi-platform kernels, move all the dtb targets
out of the mach Makefile.boot and into the arch/arm/boot/dts/Makefile
which is closer to the sources.
DTBs are only built when CONFIG_OF is enabled and now use top level
CONFIG_ARCH_xxx instead of chip or board specific config options.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Andrew Victor <linux@maxim.org.za>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <gregory.clement@free-electrons.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-tegra/Makefile.boot')
-rw-r--r-- | arch/arm/mach-tegra/Makefile.boot | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/mach-tegra/Makefile.boot b/arch/arm/mach-tegra/Makefile.boot index 7a1bb62ddcf0..29433816233c 100644 --- a/arch/arm/mach-tegra/Makefile.boot +++ b/arch/arm/mach-tegra/Makefile.boot | |||
@@ -1,11 +1,3 @@ | |||
1 | zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) += 0x00008000 | 1 | zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) += 0x00008000 |
2 | params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100 | 2 | params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100 |
3 | initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000 | 3 | initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000 |
4 | |||
5 | dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-harmony.dtb | ||
6 | dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-paz00.dtb | ||
7 | dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-seaboard.dtb | ||
8 | dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-trimslice.dtb | ||
9 | dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-ventana.dtb | ||
10 | dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-whistler.dtb | ||
11 | dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30-cardhu.dtb | ||