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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2009-06-14 06:01:05 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-06-14 06:01:05 -0400
commit06099961002a813324d057a91695af7c72939da6 (patch)
treed55ee7a8833c95ee2afb6914bb8a2977cbb9fa31 /arch/arm/mach-stmp37xx/include/mach/regs-timrot.h
parent4c31791c3d9d38ac052dd5e2981df713d8f3dcc4 (diff)
parentc11c22177ae2929598051a39e4655be4a42cb805 (diff)
Merge branch 'stmp' into devel
Diffstat (limited to 'arch/arm/mach-stmp37xx/include/mach/regs-timrot.h')
-rw-r--r--arch/arm/mach-stmp37xx/include/mach/regs-timrot.h49
1 files changed, 49 insertions, 0 deletions
diff --git a/arch/arm/mach-stmp37xx/include/mach/regs-timrot.h b/arch/arm/mach-stmp37xx/include/mach/regs-timrot.h
new file mode 100644
index 000000000000..4af0f6edfa78
--- /dev/null
+++ b/arch/arm/mach-stmp37xx/include/mach/regs-timrot.h
@@ -0,0 +1,49 @@
1/*
2 * stmp37xx: TIMROT register definitions
3 *
4 * Copyright (c) 2008 Freescale Semiconductor
5 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef _MACH_REGS_TIMROT
22#define _MACH_REGS_TIMROT
23
24#define REGS_TIMROT_BASE (STMP3XXX_REGS_BASE + 0x68000)
25
26#define HW_TIMROT_ROTCTRL 0x0
27#define BM_TIMROT_ROTCTRL_CLKGATE 0x40000000
28#define BM_TIMROT_ROTCTRL_SFTRST 0x80000000
29
30#define HW_TIMROT_TIMCTRL0 (0x20 + 0 * 0x20)
31#define HW_TIMROT_TIMCTRL1 (0x20 + 1 * 0x20)
32#define HW_TIMROT_TIMCTRL2 (0x20 + 2 * 0x20)
33
34#define HW_TIMROT_TIMCTRLn 0x20
35#define BM_TIMROT_TIMCTRLn_SELECT 0x0000000F
36#define BP_TIMROT_TIMCTRLn_SELECT 0
37#define BM_TIMROT_TIMCTRLn_PRESCALE 0x00000030
38#define BP_TIMROT_TIMCTRLn_PRESCALE 4
39#define BM_TIMROT_TIMCTRLn_RELOAD 0x00000040
40#define BM_TIMROT_TIMCTRLn_UPDATE 0x00000080
41#define BM_TIMROT_TIMCTRLn_IRQ_EN 0x00004000
42#define BM_TIMROT_TIMCTRLn_IRQ 0x00008000
43
44#define HW_TIMROT_TIMCOUNT0 (0x30 + 0 * 0x20)
45#define HW_TIMROT_TIMCOUNT1 (0x30 + 1 * 0x20)
46#define HW_TIMROT_TIMCOUNT2 (0x30 + 2 * 0x20)
47
48#define HW_TIMROT_TIMCOUNTn 0x30
49#endif