diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-14 16:42:43 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-14 16:42:43 -0400 |
commit | 2cf4d4514d5b43c1f3b64bd0ec8b9853bde8f1dc (patch) | |
tree | e35a625496acc6ac852846d40b8851186b9d1ac4 /arch/arm/mach-stmp37xx/include/mach/regs-pinctrl.h | |
parent | 44b7532b8b464f606053562400719c9c21276037 (diff) | |
parent | ce53895a5d24e0ee19fb92f56c17323fb4c9ab27 (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (417 commits)
MAINTAINERS: EB110ATX is not ebsa110
MAINTAINERS: update Eric Miao's email address and status
fb: add support of LCD display controller on pxa168/910 (base layer)
[ARM] 5552/1: ep93xx get_uart_rate(): use EP93XX_SYSCON_PWRCNT and EP93XX_SYSCON_PWRCN
[ARM] pxa/sharpsl_pm: zaurus needs generic pxa suspend/resume routines
[ARM] 5544/1: Trust PrimeCell resource sizes
[ARM] pxa/sharpsl_pm: cleanup of gpio-related code.
[ARM] pxa/sharpsl_pm: drop set_irq_type calls
[ARM] pxa/sharpsl_pm: merge pxa-specific code into generic one
[ARM] pxa/sharpsl_pm: merge the two sharpsl_pm.c since it's now pxa specific
[ARM] sa1100: remove unused collie_pm.c
[ARM] pxa: fix the conflicting non-static declarations of global_gpios[]
[ARM] 5550/1: Add default configure file for w90p910 platform
[ARM] 5549/1: Add clock api for w90p910 platform.
[ARM] 5548/1: Add gpio api for w90p910 platform
[ARM] 5551/1: Add multi-function pin api for w90p910 platform.
[ARM] Make ARM_VIC_NR depend on ARM_VIC
[ARM] 5546/1: ARM PL022 SSP/SPI driver v3
ARM: OMAP4: SMP: Update defconfig for OMAP4430
ARM: OMAP4: SMP: Enable SMP support for OMAP4430
...
Diffstat (limited to 'arch/arm/mach-stmp37xx/include/mach/regs-pinctrl.h')
-rw-r--r-- | arch/arm/mach-stmp37xx/include/mach/regs-pinctrl.h | 88 |
1 files changed, 88 insertions, 0 deletions
diff --git a/arch/arm/mach-stmp37xx/include/mach/regs-pinctrl.h b/arch/arm/mach-stmp37xx/include/mach/regs-pinctrl.h new file mode 100644 index 000000000000..d5efce2388c7 --- /dev/null +++ b/arch/arm/mach-stmp37xx/include/mach/regs-pinctrl.h | |||
@@ -0,0 +1,88 @@ | |||
1 | /* | ||
2 | * stmp37xx: PINCTRL register definitions | ||
3 | * | ||
4 | * Copyright (c) 2008 Freescale Semiconductor | ||
5 | * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #ifndef _MACH_REGS_PINCTRL | ||
22 | #define _MACH_REGS_PINCTRL | ||
23 | |||
24 | #define REGS_PINCTRL_BASE (STMP3XXX_REGS_BASE + 0x18000) | ||
25 | |||
26 | #define HW_PINCTRL_MUXSEL0 0x100 | ||
27 | #define HW_PINCTRL_MUXSEL1 0x110 | ||
28 | #define HW_PINCTRL_MUXSEL2 0x120 | ||
29 | #define HW_PINCTRL_MUXSEL3 0x130 | ||
30 | #define HW_PINCTRL_MUXSEL4 0x140 | ||
31 | #define HW_PINCTRL_MUXSEL5 0x150 | ||
32 | #define HW_PINCTRL_MUXSEL6 0x160 | ||
33 | #define HW_PINCTRL_MUXSEL7 0x170 | ||
34 | |||
35 | #define HW_PINCTRL_DRIVE0 0x200 | ||
36 | #define HW_PINCTRL_DRIVE1 0x210 | ||
37 | #define HW_PINCTRL_DRIVE2 0x220 | ||
38 | #define HW_PINCTRL_DRIVE3 0x230 | ||
39 | #define HW_PINCTRL_DRIVE4 0x240 | ||
40 | #define HW_PINCTRL_DRIVE5 0x250 | ||
41 | #define HW_PINCTRL_DRIVE6 0x260 | ||
42 | #define HW_PINCTRL_DRIVE7 0x270 | ||
43 | #define HW_PINCTRL_DRIVE8 0x280 | ||
44 | #define HW_PINCTRL_DRIVE9 0x290 | ||
45 | #define HW_PINCTRL_DRIVE10 0x2A0 | ||
46 | #define HW_PINCTRL_DRIVE11 0x2B0 | ||
47 | #define HW_PINCTRL_DRIVE12 0x2C0 | ||
48 | #define HW_PINCTRL_DRIVE13 0x2D0 | ||
49 | #define HW_PINCTRL_DRIVE14 0x2E0 | ||
50 | |||
51 | #define HW_PINCTRL_PULL0 0x300 | ||
52 | #define HW_PINCTRL_PULL1 0x310 | ||
53 | #define HW_PINCTRL_PULL2 0x320 | ||
54 | #define HW_PINCTRL_PULL3 0x330 | ||
55 | |||
56 | #define HW_PINCTRL_DOUT0 0x400 | ||
57 | #define HW_PINCTRL_DOUT1 0x410 | ||
58 | #define HW_PINCTRL_DOUT2 0x420 | ||
59 | |||
60 | #define HW_PINCTRL_DIN0 0x500 | ||
61 | #define HW_PINCTRL_DIN1 0x510 | ||
62 | #define HW_PINCTRL_DIN2 0x520 | ||
63 | |||
64 | #define HW_PINCTRL_DOE0 0x600 | ||
65 | #define HW_PINCTRL_DOE1 0x610 | ||
66 | #define HW_PINCTRL_DOE2 0x620 | ||
67 | |||
68 | #define HW_PINCTRL_PIN2IRQ0 0x700 | ||
69 | #define HW_PINCTRL_PIN2IRQ1 0x710 | ||
70 | #define HW_PINCTRL_PIN2IRQ2 0x720 | ||
71 | |||
72 | #define HW_PINCTRL_IRQEN0 0x800 | ||
73 | #define HW_PINCTRL_IRQEN1 0x810 | ||
74 | #define HW_PINCTRL_IRQEN2 0x820 | ||
75 | |||
76 | #define HW_PINCTRL_IRQLEVEL0 0x900 | ||
77 | #define HW_PINCTRL_IRQLEVEL1 0x910 | ||
78 | #define HW_PINCTRL_IRQLEVEL2 0x920 | ||
79 | |||
80 | #define HW_PINCTRL_IRQPOL0 0xA00 | ||
81 | #define HW_PINCTRL_IRQPOL1 0xA10 | ||
82 | #define HW_PINCTRL_IRQPOL2 0xA20 | ||
83 | |||
84 | #define HW_PINCTRL_IRQSTAT0 0xB00 | ||
85 | #define HW_PINCTRL_IRQSTAT1 0xB10 | ||
86 | #define HW_PINCTRL_IRQSTAT2 0xB20 | ||
87 | |||
88 | #endif | ||