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authorviresh kumar <viresh.kumar@st.com>2011-03-06 23:57:06 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-03-09 04:49:46 -0500
commit53821162fce0e69a8d9fb98ae87ce27c1b500b8e (patch)
tree2aee16c814cea1ddbd0b6e660b08bf6a718f8c65 /arch/arm/mach-spear6xx
parentc2c07831a76ca64670df9cc315087962f6fdceac (diff)
ARM: 6792/1: SPEAr: Replace SIZE macro's with SZ_4K macros
Resource size required mostly is 4K for all devices, whereas currently reserved space is much beyond that. This patch replaces SIZE macro's used at multiple places with SZ_4K. Reviewed-by: Stanley Miao <stanley.miao@windriver.com> Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-spear6xx')
-rw-r--r--arch/arm/mach-spear6xx/spear6xx.c25
1 files changed, 10 insertions, 15 deletions
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
index 378440bdb1c9..981812961ac7 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -31,8 +31,7 @@ struct amba_device uart_device[] = {
31 }, 31 },
32 .res = { 32 .res = {
33 .start = SPEAR6XX_ICM1_UART0_BASE, 33 .start = SPEAR6XX_ICM1_UART0_BASE,
34 .end = SPEAR6XX_ICM1_UART0_BASE + 34 .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1,
35 SPEAR6XX_ICM1_UART0_SIZE - 1,
36 .flags = IORESOURCE_MEM, 35 .flags = IORESOURCE_MEM,
37 }, 36 },
38 .irq = {IRQ_UART_0, NO_IRQ}, 37 .irq = {IRQ_UART_0, NO_IRQ},
@@ -42,8 +41,7 @@ struct amba_device uart_device[] = {
42 }, 41 },
43 .res = { 42 .res = {
44 .start = SPEAR6XX_ICM1_UART1_BASE, 43 .start = SPEAR6XX_ICM1_UART1_BASE,
45 .end = SPEAR6XX_ICM1_UART1_BASE + 44 .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1,
46 SPEAR6XX_ICM1_UART1_SIZE - 1,
47 .flags = IORESOURCE_MEM, 45 .flags = IORESOURCE_MEM,
48 }, 46 },
49 .irq = {IRQ_UART_1, NO_IRQ}, 47 .irq = {IRQ_UART_1, NO_IRQ},
@@ -72,8 +70,7 @@ struct amba_device gpio_device[] = {
72 }, 70 },
73 .res = { 71 .res = {
74 .start = SPEAR6XX_CPU_GPIO_BASE, 72 .start = SPEAR6XX_CPU_GPIO_BASE,
75 .end = SPEAR6XX_CPU_GPIO_BASE + 73 .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1,
76 SPEAR6XX_CPU_GPIO_SIZE - 1,
77 .flags = IORESOURCE_MEM, 74 .flags = IORESOURCE_MEM,
78 }, 75 },
79 .irq = {IRQ_LOCAL_GPIO, NO_IRQ}, 76 .irq = {IRQ_LOCAL_GPIO, NO_IRQ},
@@ -84,8 +81,7 @@ struct amba_device gpio_device[] = {
84 }, 81 },
85 .res = { 82 .res = {
86 .start = SPEAR6XX_ICM3_GPIO_BASE, 83 .start = SPEAR6XX_ICM3_GPIO_BASE,
87 .end = SPEAR6XX_ICM3_GPIO_BASE + 84 .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1,
88 SPEAR6XX_ICM3_GPIO_SIZE - 1,
89 .flags = IORESOURCE_MEM, 85 .flags = IORESOURCE_MEM,
90 }, 86 },
91 .irq = {IRQ_BASIC_GPIO, NO_IRQ}, 87 .irq = {IRQ_BASIC_GPIO, NO_IRQ},
@@ -96,8 +92,7 @@ struct amba_device gpio_device[] = {
96 }, 92 },
97 .res = { 93 .res = {
98 .start = SPEAR6XX_ICM2_GPIO_BASE, 94 .start = SPEAR6XX_ICM2_GPIO_BASE,
99 .end = SPEAR6XX_ICM2_GPIO_BASE + 95 .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1,
100 SPEAR6XX_ICM2_GPIO_SIZE - 1,
101 .flags = IORESOURCE_MEM, 96 .flags = IORESOURCE_MEM,
102 }, 97 },
103 .irq = {IRQ_APPL_GPIO, NO_IRQ}, 98 .irq = {IRQ_APPL_GPIO, NO_IRQ},
@@ -122,27 +117,27 @@ static struct map_desc spear6xx_io_desc[] __initdata = {
122 { 117 {
123 .virtual = VA_SPEAR6XX_ICM1_UART0_BASE, 118 .virtual = VA_SPEAR6XX_ICM1_UART0_BASE,
124 .pfn = __phys_to_pfn(SPEAR6XX_ICM1_UART0_BASE), 119 .pfn = __phys_to_pfn(SPEAR6XX_ICM1_UART0_BASE),
125 .length = SPEAR6XX_ICM1_UART0_SIZE, 120 .length = SZ_4K,
126 .type = MT_DEVICE 121 .type = MT_DEVICE
127 }, { 122 }, {
128 .virtual = VA_SPEAR6XX_CPU_VIC_PRI_BASE, 123 .virtual = VA_SPEAR6XX_CPU_VIC_PRI_BASE,
129 .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_PRI_BASE), 124 .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_PRI_BASE),
130 .length = SPEAR6XX_CPU_VIC_PRI_SIZE, 125 .length = SZ_4K,
131 .type = MT_DEVICE 126 .type = MT_DEVICE
132 }, { 127 }, {
133 .virtual = VA_SPEAR6XX_CPU_VIC_SEC_BASE, 128 .virtual = VA_SPEAR6XX_CPU_VIC_SEC_BASE,
134 .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_SEC_BASE), 129 .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_SEC_BASE),
135 .length = SPEAR6XX_CPU_VIC_SEC_SIZE, 130 .length = SZ_4K,
136 .type = MT_DEVICE 131 .type = MT_DEVICE
137 }, { 132 }, {
138 .virtual = VA_SPEAR6XX_ICM3_SYS_CTRL_BASE, 133 .virtual = VA_SPEAR6XX_ICM3_SYS_CTRL_BASE,
139 .pfn = __phys_to_pfn(SPEAR6XX_ICM3_SYS_CTRL_BASE), 134 .pfn = __phys_to_pfn(SPEAR6XX_ICM3_SYS_CTRL_BASE),
140 .length = SPEAR6XX_ICM3_MISC_REG_BASE, 135 .length = SZ_4K,
141 .type = MT_DEVICE 136 .type = MT_DEVICE
142 }, { 137 }, {
143 .virtual = VA_SPEAR6XX_ICM3_MISC_REG_BASE, 138 .virtual = VA_SPEAR6XX_ICM3_MISC_REG_BASE,
144 .pfn = __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE), 139 .pfn = __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE),
145 .length = SPEAR6XX_ICM3_MISC_REG_SIZE, 140 .length = SZ_4K,
146 .type = MT_DEVICE 141 .type = MT_DEVICE
147 }, 142 },
148}; 143};