diff options
author | viresh kumar <viresh.kumar@st.com> | 2010-04-01 07:31:29 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-04-14 06:34:38 -0400 |
commit | 70f4c0bf9e4d067744ee453bc37c0c4adcea6e53 (patch) | |
tree | 0918b10d980c503c258687a0c65b8d0428d3a455 /arch/arm/mach-spear3xx/spear320.c | |
parent | b77932a4d265586748f05a8c8fad7ef4174c0296 (diff) |
ARM: 6020/1: ST SPEAr: Adding gpio pad multiplexing support
GPIO Pads in spear platform are are multiplexed in various machines.
This patch adds support for this pad multiplexing.
Reviewed-by: Linus Walleij <linux.walleij@stericsson.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-spear3xx/spear320.c')
-rw-r--r-- | arch/arm/mach-spear3xx/spear320.c | 374 |
1 files changed, 374 insertions, 0 deletions
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c index 72d45489dcb0..2cedf5eb9ec9 100644 --- a/arch/arm/mach-spear3xx/spear320.c +++ b/arch/arm/mach-spear3xx/spear320.c | |||
@@ -16,10 +16,384 @@ | |||
16 | #include <mach/generic.h> | 16 | #include <mach/generic.h> |
17 | #include <mach/spear.h> | 17 | #include <mach/spear.h> |
18 | 18 | ||
19 | /* pad multiplexing support */ | ||
20 | /* muxing registers */ | ||
21 | #define PAD_MUX_CONFIG_REG 0x0C | ||
22 | #define MODE_CONFIG_REG 0x10 | ||
23 | |||
24 | /* modes */ | ||
25 | #define AUTO_NET_SMII_MODE (1 << 0) | ||
26 | #define AUTO_NET_MII_MODE (1 << 1) | ||
27 | #define AUTO_EXP_MODE (1 << 2) | ||
28 | #define SMALL_PRINTERS_MODE (1 << 3) | ||
29 | #define ALL_MODES 0xF | ||
30 | |||
31 | struct pmx_mode auto_net_smii_mode = { | ||
32 | .id = AUTO_NET_SMII_MODE, | ||
33 | .name = "Automation Networking SMII Mode", | ||
34 | .mask = 0x00, | ||
35 | }; | ||
36 | |||
37 | struct pmx_mode auto_net_mii_mode = { | ||
38 | .id = AUTO_NET_MII_MODE, | ||
39 | .name = "Automation Networking MII Mode", | ||
40 | .mask = 0x01, | ||
41 | }; | ||
42 | |||
43 | struct pmx_mode auto_exp_mode = { | ||
44 | .id = AUTO_EXP_MODE, | ||
45 | .name = "Automation Expanded Mode", | ||
46 | .mask = 0x02, | ||
47 | }; | ||
48 | |||
49 | struct pmx_mode small_printers_mode = { | ||
50 | .id = SMALL_PRINTERS_MODE, | ||
51 | .name = "Small Printers Mode", | ||
52 | .mask = 0x03, | ||
53 | }; | ||
54 | |||
55 | /* devices */ | ||
56 | struct pmx_dev_mode pmx_clcd_modes[] = { | ||
57 | { | ||
58 | .ids = AUTO_NET_SMII_MODE, | ||
59 | .mask = 0x0, | ||
60 | }, | ||
61 | }; | ||
62 | |||
63 | struct pmx_dev pmx_clcd = { | ||
64 | .name = "clcd", | ||
65 | .modes = pmx_clcd_modes, | ||
66 | .mode_count = ARRAY_SIZE(pmx_clcd_modes), | ||
67 | .enb_on_reset = 1, | ||
68 | }; | ||
69 | |||
70 | struct pmx_dev_mode pmx_emi_modes[] = { | ||
71 | { | ||
72 | .ids = AUTO_EXP_MODE, | ||
73 | .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK, | ||
74 | }, | ||
75 | }; | ||
76 | |||
77 | struct pmx_dev pmx_emi = { | ||
78 | .name = "emi", | ||
79 | .modes = pmx_emi_modes, | ||
80 | .mode_count = ARRAY_SIZE(pmx_emi_modes), | ||
81 | .enb_on_reset = 1, | ||
82 | }; | ||
83 | |||
84 | struct pmx_dev_mode pmx_fsmc_modes[] = { | ||
85 | { | ||
86 | .ids = ALL_MODES, | ||
87 | .mask = 0x0, | ||
88 | }, | ||
89 | }; | ||
90 | |||
91 | struct pmx_dev pmx_fsmc = { | ||
92 | .name = "fsmc", | ||
93 | .modes = pmx_fsmc_modes, | ||
94 | .mode_count = ARRAY_SIZE(pmx_fsmc_modes), | ||
95 | .enb_on_reset = 1, | ||
96 | }; | ||
97 | |||
98 | struct pmx_dev_mode pmx_spp_modes[] = { | ||
99 | { | ||
100 | .ids = SMALL_PRINTERS_MODE, | ||
101 | .mask = 0x0, | ||
102 | }, | ||
103 | }; | ||
104 | |||
105 | struct pmx_dev pmx_spp = { | ||
106 | .name = "spp", | ||
107 | .modes = pmx_spp_modes, | ||
108 | .mode_count = ARRAY_SIZE(pmx_spp_modes), | ||
109 | .enb_on_reset = 1, | ||
110 | }; | ||
111 | |||
112 | struct pmx_dev_mode pmx_sdio_modes[] = { | ||
113 | { | ||
114 | .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | | ||
115 | SMALL_PRINTERS_MODE, | ||
116 | .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK, | ||
117 | }, | ||
118 | }; | ||
119 | |||
120 | struct pmx_dev pmx_sdio = { | ||
121 | .name = "sdio", | ||
122 | .modes = pmx_sdio_modes, | ||
123 | .mode_count = ARRAY_SIZE(pmx_sdio_modes), | ||
124 | .enb_on_reset = 1, | ||
125 | }; | ||
126 | |||
127 | struct pmx_dev_mode pmx_i2s_modes[] = { | ||
128 | { | ||
129 | .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE, | ||
130 | .mask = PMX_UART0_MODEM_MASK, | ||
131 | }, | ||
132 | }; | ||
133 | |||
134 | struct pmx_dev pmx_i2s = { | ||
135 | .name = "i2s", | ||
136 | .modes = pmx_i2s_modes, | ||
137 | .mode_count = ARRAY_SIZE(pmx_i2s_modes), | ||
138 | .enb_on_reset = 1, | ||
139 | }; | ||
140 | |||
141 | struct pmx_dev_mode pmx_uart1_modes[] = { | ||
142 | { | ||
143 | .ids = ALL_MODES, | ||
144 | .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK, | ||
145 | }, | ||
146 | }; | ||
147 | |||
148 | struct pmx_dev pmx_uart1 = { | ||
149 | .name = "uart1", | ||
150 | .modes = pmx_uart1_modes, | ||
151 | .mode_count = ARRAY_SIZE(pmx_uart1_modes), | ||
152 | .enb_on_reset = 1, | ||
153 | }; | ||
154 | |||
155 | struct pmx_dev_mode pmx_uart1_modem_modes[] = { | ||
156 | { | ||
157 | .ids = AUTO_EXP_MODE, | ||
158 | .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK | | ||
159 | PMX_SSP_CS_MASK, | ||
160 | }, { | ||
161 | .ids = SMALL_PRINTERS_MODE, | ||
162 | .mask = PMX_GPIO_PIN3_MASK | PMX_GPIO_PIN4_MASK | | ||
163 | PMX_GPIO_PIN5_MASK | PMX_SSP_CS_MASK, | ||
164 | }, | ||
165 | }; | ||
166 | |||
167 | struct pmx_dev pmx_uart1_modem = { | ||
168 | .name = "uart1_modem", | ||
169 | .modes = pmx_uart1_modem_modes, | ||
170 | .mode_count = ARRAY_SIZE(pmx_uart1_modem_modes), | ||
171 | .enb_on_reset = 1, | ||
172 | }; | ||
173 | |||
174 | struct pmx_dev_mode pmx_uart2_modes[] = { | ||
175 | { | ||
176 | .ids = ALL_MODES, | ||
177 | .mask = PMX_FIRDA_MASK, | ||
178 | }, | ||
179 | }; | ||
180 | |||
181 | struct pmx_dev pmx_uart2 = { | ||
182 | .name = "uart2", | ||
183 | .modes = pmx_uart2_modes, | ||
184 | .mode_count = ARRAY_SIZE(pmx_uart2_modes), | ||
185 | .enb_on_reset = 1, | ||
186 | }; | ||
187 | |||
188 | struct pmx_dev_mode pmx_touchscreen_modes[] = { | ||
189 | { | ||
190 | .ids = AUTO_NET_SMII_MODE, | ||
191 | .mask = PMX_SSP_CS_MASK, | ||
192 | }, | ||
193 | }; | ||
194 | |||
195 | struct pmx_dev pmx_touchscreen = { | ||
196 | .name = "touchscreen", | ||
197 | .modes = pmx_touchscreen_modes, | ||
198 | .mode_count = ARRAY_SIZE(pmx_touchscreen_modes), | ||
199 | .enb_on_reset = 1, | ||
200 | }; | ||
201 | |||
202 | struct pmx_dev_mode pmx_can_modes[] = { | ||
203 | { | ||
204 | .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | AUTO_EXP_MODE, | ||
205 | .mask = PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK | | ||
206 | PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK, | ||
207 | }, | ||
208 | }; | ||
209 | |||
210 | struct pmx_dev pmx_can = { | ||
211 | .name = "can", | ||
212 | .modes = pmx_can_modes, | ||
213 | .mode_count = ARRAY_SIZE(pmx_can_modes), | ||
214 | .enb_on_reset = 1, | ||
215 | }; | ||
216 | |||
217 | struct pmx_dev_mode pmx_sdio_led_modes[] = { | ||
218 | { | ||
219 | .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE, | ||
220 | .mask = PMX_SSP_CS_MASK, | ||
221 | }, | ||
222 | }; | ||
223 | |||
224 | struct pmx_dev pmx_sdio_led = { | ||
225 | .name = "sdio_led", | ||
226 | .modes = pmx_sdio_led_modes, | ||
227 | .mode_count = ARRAY_SIZE(pmx_sdio_led_modes), | ||
228 | .enb_on_reset = 1, | ||
229 | }; | ||
230 | |||
231 | struct pmx_dev_mode pmx_pwm0_modes[] = { | ||
232 | { | ||
233 | .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE, | ||
234 | .mask = PMX_UART0_MODEM_MASK, | ||
235 | }, { | ||
236 | .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE, | ||
237 | .mask = PMX_MII_MASK, | ||
238 | }, | ||
239 | }; | ||
240 | |||
241 | struct pmx_dev pmx_pwm0 = { | ||
242 | .name = "pwm0", | ||
243 | .modes = pmx_pwm0_modes, | ||
244 | .mode_count = ARRAY_SIZE(pmx_pwm0_modes), | ||
245 | .enb_on_reset = 1, | ||
246 | }; | ||
247 | |||
248 | struct pmx_dev_mode pmx_pwm1_modes[] = { | ||
249 | { | ||
250 | .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE, | ||
251 | .mask = PMX_UART0_MODEM_MASK, | ||
252 | }, { | ||
253 | .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE, | ||
254 | .mask = PMX_MII_MASK, | ||
255 | }, | ||
256 | }; | ||
257 | |||
258 | struct pmx_dev pmx_pwm1 = { | ||
259 | .name = "pwm1", | ||
260 | .modes = pmx_pwm1_modes, | ||
261 | .mode_count = ARRAY_SIZE(pmx_pwm1_modes), | ||
262 | .enb_on_reset = 1, | ||
263 | }; | ||
264 | |||
265 | struct pmx_dev_mode pmx_pwm2_modes[] = { | ||
266 | { | ||
267 | .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE, | ||
268 | .mask = PMX_SSP_CS_MASK, | ||
269 | }, { | ||
270 | .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE, | ||
271 | .mask = PMX_MII_MASK, | ||
272 | }, | ||
273 | }; | ||
274 | |||
275 | struct pmx_dev pmx_pwm2 = { | ||
276 | .name = "pwm2", | ||
277 | .modes = pmx_pwm2_modes, | ||
278 | .mode_count = ARRAY_SIZE(pmx_pwm2_modes), | ||
279 | .enb_on_reset = 1, | ||
280 | }; | ||
281 | |||
282 | struct pmx_dev_mode pmx_pwm3_modes[] = { | ||
283 | { | ||
284 | .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE, | ||
285 | .mask = PMX_MII_MASK, | ||
286 | }, | ||
287 | }; | ||
288 | |||
289 | struct pmx_dev pmx_pwm3 = { | ||
290 | .name = "pwm3", | ||
291 | .modes = pmx_pwm3_modes, | ||
292 | .mode_count = ARRAY_SIZE(pmx_pwm3_modes), | ||
293 | .enb_on_reset = 1, | ||
294 | }; | ||
295 | |||
296 | struct pmx_dev_mode pmx_ssp1_modes[] = { | ||
297 | { | ||
298 | .ids = SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE, | ||
299 | .mask = PMX_MII_MASK, | ||
300 | }, | ||
301 | }; | ||
302 | |||
303 | struct pmx_dev pmx_ssp1 = { | ||
304 | .name = "ssp1", | ||
305 | .modes = pmx_ssp1_modes, | ||
306 | .mode_count = ARRAY_SIZE(pmx_ssp1_modes), | ||
307 | .enb_on_reset = 1, | ||
308 | }; | ||
309 | |||
310 | struct pmx_dev_mode pmx_ssp2_modes[] = { | ||
311 | { | ||
312 | .ids = AUTO_NET_SMII_MODE, | ||
313 | .mask = PMX_MII_MASK, | ||
314 | }, | ||
315 | }; | ||
316 | |||
317 | struct pmx_dev pmx_ssp2 = { | ||
318 | .name = "ssp2", | ||
319 | .modes = pmx_ssp2_modes, | ||
320 | .mode_count = ARRAY_SIZE(pmx_ssp2_modes), | ||
321 | .enb_on_reset = 1, | ||
322 | }; | ||
323 | |||
324 | struct pmx_dev_mode pmx_mii1_modes[] = { | ||
325 | { | ||
326 | .ids = AUTO_NET_MII_MODE, | ||
327 | .mask = 0x0, | ||
328 | }, | ||
329 | }; | ||
330 | |||
331 | struct pmx_dev pmx_mii1 = { | ||
332 | .name = "mii1", | ||
333 | .modes = pmx_mii1_modes, | ||
334 | .mode_count = ARRAY_SIZE(pmx_mii1_modes), | ||
335 | .enb_on_reset = 1, | ||
336 | }; | ||
337 | |||
338 | struct pmx_dev_mode pmx_smii0_modes[] = { | ||
339 | { | ||
340 | .ids = AUTO_NET_SMII_MODE | AUTO_EXP_MODE | SMALL_PRINTERS_MODE, | ||
341 | .mask = PMX_MII_MASK, | ||
342 | }, | ||
343 | }; | ||
344 | |||
345 | struct pmx_dev pmx_smii0 = { | ||
346 | .name = "smii0", | ||
347 | .modes = pmx_smii0_modes, | ||
348 | .mode_count = ARRAY_SIZE(pmx_smii0_modes), | ||
349 | .enb_on_reset = 1, | ||
350 | }; | ||
351 | |||
352 | struct pmx_dev_mode pmx_smii1_modes[] = { | ||
353 | { | ||
354 | .ids = AUTO_NET_SMII_MODE | SMALL_PRINTERS_MODE, | ||
355 | .mask = PMX_MII_MASK, | ||
356 | }, | ||
357 | }; | ||
358 | |||
359 | struct pmx_dev pmx_smii1 = { | ||
360 | .name = "smii1", | ||
361 | .modes = pmx_smii1_modes, | ||
362 | .mode_count = ARRAY_SIZE(pmx_smii1_modes), | ||
363 | .enb_on_reset = 1, | ||
364 | }; | ||
365 | |||
366 | struct pmx_dev_mode pmx_i2c1_modes[] = { | ||
367 | { | ||
368 | .ids = AUTO_EXP_MODE, | ||
369 | .mask = 0x0, | ||
370 | }, | ||
371 | }; | ||
372 | |||
373 | struct pmx_dev pmx_i2c1 = { | ||
374 | .name = "i2c1", | ||
375 | .modes = pmx_i2c1_modes, | ||
376 | .mode_count = ARRAY_SIZE(pmx_i2c1_modes), | ||
377 | .enb_on_reset = 1, | ||
378 | }; | ||
379 | |||
380 | /* pmx driver structure */ | ||
381 | struct pmx_driver pmx_driver = { | ||
382 | .mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x00000007}, | ||
383 | .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff}, | ||
384 | }; | ||
385 | |||
19 | /* Add spear320 specific devices here */ | 386 | /* Add spear320 specific devices here */ |
20 | 387 | ||
388 | /* spear320 routines */ | ||
21 | void __init spear320_init(void) | 389 | void __init spear320_init(void) |
22 | { | 390 | { |
23 | /* call spear3xx family common init function */ | 391 | /* call spear3xx family common init function */ |
24 | spear3xx_init(); | 392 | spear3xx_init(); |
25 | } | 393 | } |
394 | |||
395 | void spear320_pmx_init(void) | ||
396 | { | ||
397 | spear_pmx_init(&pmx_driver, SPEAR320_SOC_CONFIG_BASE, | ||
398 | SPEAR320_SOC_CONFIG_SIZE); | ||
399 | } | ||