diff options
author | Geert Uytterhoeven <geert+renesas@linux-m68k.org> | 2014-03-12 14:40:39 -0400 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2014-03-12 21:37:14 -0400 |
commit | a51a9d67ba061c1263d078c27e8a3020d61fe236 (patch) | |
tree | c1c4823f05c2bdc1746cf447a7202eff15263cf6 /arch/arm/mach-shmobile | |
parent | d93023f81d2c79595e64e4f516f03af4e4c73c13 (diff) |
ARM: shmobile: r8a7791: Fix SCIFA3-5 clocks
The MSTP clocks for SCIFA3-5 are MSTP1106-1108, not MSTP1105-1107
Also reinsert them at the correct position to preserve sort order.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile')
-rw-r--r-- | arch/arm/mach-shmobile/clock-r8a7791.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c index 605fc778e3e2..701383fe3267 100644 --- a/arch/arm/mach-shmobile/clock-r8a7791.c +++ b/arch/arm/mach-shmobile/clock-r8a7791.c | |||
@@ -170,6 +170,7 @@ static struct clk div6_clks[DIV6_NR] = { | |||
170 | 170 | ||
171 | /* MSTP */ | 171 | /* MSTP */ |
172 | enum { | 172 | enum { |
173 | MSTP1108, MSTP1107, MSTP1106, | ||
173 | MSTP931, MSTP930, MSTP929, MSTP928, MSTP927, MSTP925, | 174 | MSTP931, MSTP930, MSTP929, MSTP928, MSTP927, MSTP925, |
174 | MSTP917, | 175 | MSTP917, |
175 | MSTP815, MSTP814, | 176 | MSTP815, MSTP814, |
@@ -180,12 +181,15 @@ enum { | |||
180 | MSTP522, | 181 | MSTP522, |
181 | MSTP314, MSTP312, MSTP311, | 182 | MSTP314, MSTP312, MSTP311, |
182 | MSTP216, MSTP207, MSTP206, | 183 | MSTP216, MSTP207, MSTP206, |
183 | MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107, | 184 | MSTP204, MSTP203, MSTP202, |
184 | MSTP124, | 185 | MSTP124, |
185 | MSTP_NR | 186 | MSTP_NR |
186 | }; | 187 | }; |
187 | 188 | ||
188 | static struct clk mstp_clks[MSTP_NR] = { | 189 | static struct clk mstp_clks[MSTP_NR] = { |
190 | [MSTP1108] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 8, MSTPSR11, 0), /* SCIFA5 */ | ||
191 | [MSTP1107] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 7, MSTPSR11, 0), /* SCIFA4 */ | ||
192 | [MSTP1106] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 6, MSTPSR11, 0), /* SCIFA3 */ | ||
189 | [MSTP931] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */ | 193 | [MSTP931] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */ |
190 | [MSTP930] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */ | 194 | [MSTP930] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */ |
191 | [MSTP929] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */ | 195 | [MSTP929] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */ |
@@ -218,9 +222,6 @@ static struct clk mstp_clks[MSTP_NR] = { | |||
218 | [MSTP204] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 4, MSTPSR2, 0), /* SCIFA0 */ | 222 | [MSTP204] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 4, MSTPSR2, 0), /* SCIFA0 */ |
219 | [MSTP203] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 3, MSTPSR2, 0), /* SCIFA1 */ | 223 | [MSTP203] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 3, MSTPSR2, 0), /* SCIFA1 */ |
220 | [MSTP202] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 2, MSTPSR2, 0), /* SCIFA2 */ | 224 | [MSTP202] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 2, MSTPSR2, 0), /* SCIFA2 */ |
221 | [MSTP1105] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 5, MSTPSR11, 0), /* SCIFA3 */ | ||
222 | [MSTP1106] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 6, MSTPSR11, 0), /* SCIFA4 */ | ||
223 | [MSTP1107] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR11, 7, MSTPSR11, 0), /* SCIFA5 */ | ||
224 | [MSTP124] = SH_CLK_MSTP32_STS(&rclk_clk, SMSTPCR1, 24, MSTPSR1, 0), /* CMT0 */ | 225 | [MSTP124] = SH_CLK_MSTP32_STS(&rclk_clk, SMSTPCR1, 24, MSTPSR1, 0), /* CMT0 */ |
225 | }; | 226 | }; |
226 | 227 | ||
@@ -259,9 +260,9 @@ static struct clk_lookup lookups[] = { | |||
259 | CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP718]), /* SCIF3 */ | 260 | CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP718]), /* SCIF3 */ |
260 | CLKDEV_DEV_ID("sh-sci.10", &mstp_clks[MSTP715]), /* SCIF4 */ | 261 | CLKDEV_DEV_ID("sh-sci.10", &mstp_clks[MSTP715]), /* SCIF4 */ |
261 | CLKDEV_DEV_ID("sh-sci.11", &mstp_clks[MSTP714]), /* SCIF5 */ | 262 | CLKDEV_DEV_ID("sh-sci.11", &mstp_clks[MSTP714]), /* SCIF5 */ |
262 | CLKDEV_DEV_ID("sh-sci.12", &mstp_clks[MSTP1105]), /* SCIFA3 */ | 263 | CLKDEV_DEV_ID("sh-sci.12", &mstp_clks[MSTP1106]), /* SCIFA3 */ |
263 | CLKDEV_DEV_ID("sh-sci.13", &mstp_clks[MSTP1106]), /* SCIFA4 */ | 264 | CLKDEV_DEV_ID("sh-sci.13", &mstp_clks[MSTP1107]), /* SCIFA4 */ |
264 | CLKDEV_DEV_ID("sh-sci.14", &mstp_clks[MSTP1107]), /* SCIFA5 */ | 265 | CLKDEV_DEV_ID("sh-sci.14", &mstp_clks[MSTP1108]), /* SCIFA5 */ |
265 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), | 266 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), |
266 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP312]), | 267 | CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP312]), |
267 | CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), | 268 | CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), |