diff options
author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2012-10-31 01:57:25 -0400 |
---|---|---|
committer | Simon Horman <horms@verge.net.au> | 2012-11-08 01:21:46 -0500 |
commit | 7c4fd734bfb722433d2782208e610b31e751f94e (patch) | |
tree | 07026796a5a205606040a6ba20632c24040afe01 /arch/arm/mach-shmobile | |
parent | dc3cad8222ca0fc67d3f7e867e8e39a64c28bedf (diff) |
ARM: shmobile: r8a7740: add FSI-DVI clocks
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile')
-rw-r--r-- | arch/arm/mach-shmobile/clock-r8a7740.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c index c012bbf4e05c..eb5dfee29e63 100644 --- a/arch/arm/mach-shmobile/clock-r8a7740.c +++ b/arch/arm/mach-shmobile/clock-r8a7740.c | |||
@@ -65,6 +65,9 @@ | |||
65 | #define SMSTPCR3 IOMEM(0xe615013c) | 65 | #define SMSTPCR3 IOMEM(0xe615013c) |
66 | #define SMSTPCR4 IOMEM(0xe6150140) | 66 | #define SMSTPCR4 IOMEM(0xe6150140) |
67 | 67 | ||
68 | #define FSIDIVA IOMEM(0xFE1F8000) | ||
69 | #define FSIDIVB IOMEM(0xFE1F8008) | ||
70 | |||
68 | /* Fixed 32 KHz root clock from EXTALR pin */ | 71 | /* Fixed 32 KHz root clock from EXTALR pin */ |
69 | static struct clk extalr_clk = { | 72 | static struct clk extalr_clk = { |
70 | .rate = 32768, | 73 | .rate = 32768, |
@@ -443,6 +446,14 @@ static struct clk *late_main_clks[] = { | |||
443 | &hdmi2_clk, | 446 | &hdmi2_clk, |
444 | }; | 447 | }; |
445 | 448 | ||
449 | /* FSI DIV */ | ||
450 | enum { FSIDIV_A, FSIDIV_B, FSIDIV_REPARENT_NR }; | ||
451 | |||
452 | static struct clk fsidivs[] = { | ||
453 | [FSIDIV_A] = SH_CLK_FSIDIV(FSIDIVA, &div6_reparent_clks[DIV6_FSIA]), | ||
454 | [FSIDIV_B] = SH_CLK_FSIDIV(FSIDIVB, &div6_reparent_clks[DIV6_FSIB]), | ||
455 | }; | ||
456 | |||
446 | /* MSTP */ | 457 | /* MSTP */ |
447 | enum { | 458 | enum { |
448 | DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_HP, | 459 | DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_HP, |
@@ -612,6 +623,8 @@ static struct clk_lookup lookups[] = { | |||
612 | 623 | ||
613 | CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]), | 624 | CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]), |
614 | CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]), | 625 | CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]), |
626 | CLKDEV_ICK_ID("diva", "sh_fsi2", &fsidivs[FSIDIV_A]), | ||
627 | CLKDEV_ICK_ID("divb", "sh_fsi2", &fsidivs[FSIDIV_B]), | ||
615 | }; | 628 | }; |
616 | 629 | ||
617 | void __init r8a7740_clock_init(u8 md_ck) | 630 | void __init r8a7740_clock_init(u8 md_ck) |
@@ -657,6 +670,9 @@ void __init r8a7740_clock_init(u8 md_ck) | |||
657 | for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) | 670 | for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) |
658 | ret = clk_register(late_main_clks[k]); | 671 | ret = clk_register(late_main_clks[k]); |
659 | 672 | ||
673 | if (!ret) | ||
674 | ret = sh_clk_fsidiv_register(fsidivs, FSIDIV_REPARENT_NR); | ||
675 | |||
660 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | 676 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); |
661 | 677 | ||
662 | if (!ret) | 678 | if (!ret) |