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authorJiri Kosina <jkosina@suse.cz>2010-12-22 12:57:02 -0500
committerJiri Kosina <jkosina@suse.cz>2010-12-22 12:57:02 -0500
commit4b7bd364700d9ac8372eff48832062b936d0793b (patch)
tree0dbf78c95456a0b02d07fcd473281f04a87e266d /arch/arm/mach-shmobile
parentc0d8768af260e2cbb4bf659ae6094a262c86b085 (diff)
parent90a8a73c06cc32b609a880d48449d7083327e11a (diff)
Merge branch 'master' into for-next
Conflicts: MAINTAINERS arch/arm/mach-omap2/pm24xx.c drivers/scsi/bfa/bfa_fcpim.c Needed to update to apply fixes for which the old branch was too outdated.
Diffstat (limited to 'arch/arm/mach-shmobile')
-rw-r--r--arch/arm/mach-shmobile/Kconfig2
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c167
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c115
-rw-r--r--arch/arm/mach-shmobile/include/mach/entry-macro.S30
-rw-r--r--arch/arm/mach-shmobile/include/mach/gpio.h4
-rw-r--r--arch/arm/mach-shmobile/include/mach/sh7372.h2
-rw-r--r--arch/arm/mach-shmobile/include/mach/vmalloc.h2
-rw-r--r--arch/arm/mach-shmobile/intc-sh7372.c2
8 files changed, 279 insertions, 45 deletions
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 54b479c35ee0..51dcd59eda6a 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -116,4 +116,6 @@ endmenu
116config SH_CLK_CPG 116config SH_CLK_CPG
117 bool 117 bool
118 118
119source "drivers/sh/Kconfig"
120
119endif 121endif
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 46ca4d4abf91..d440e5f456ad 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -163,11 +163,13 @@ static struct mtd_partition nor_flash_partitions[] = {
163 .name = "loader", 163 .name = "loader",
164 .offset = 0x00000000, 164 .offset = 0x00000000,
165 .size = 512 * 1024, 165 .size = 512 * 1024,
166 .mask_flags = MTD_WRITEABLE,
166 }, 167 },
167 { 168 {
168 .name = "bootenv", 169 .name = "bootenv",
169 .offset = MTDPART_OFS_APPEND, 170 .offset = MTDPART_OFS_APPEND,
170 .size = 512 * 1024, 171 .size = 512 * 1024,
172 .mask_flags = MTD_WRITEABLE,
171 }, 173 },
172 { 174 {
173 .name = "kernel_ro", 175 .name = "kernel_ro",
@@ -565,12 +567,143 @@ static struct platform_device *qhd_devices[] __initdata = {
565 567
566/* FSI */ 568/* FSI */
567#define IRQ_FSI evt2irq(0x1840) 569#define IRQ_FSI evt2irq(0x1840)
570static int __fsi_set_rate(struct clk *clk, long rate, int enable)
571{
572 int ret = 0;
573
574 if (rate <= 0)
575 return ret;
576
577 if (enable) {
578 ret = clk_set_rate(clk, rate);
579 if (0 == ret)
580 ret = clk_enable(clk);
581 } else {
582 clk_disable(clk);
583 }
584
585 return ret;
586}
587
588static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
589{
590 return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable);
591}
592
593static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable)
594{
595 struct clk *fsia_ick;
596 struct clk *fsiack;
597 int ret = -EIO;
598
599 fsia_ick = clk_get(dev, "icka");
600 if (IS_ERR(fsia_ick))
601 return PTR_ERR(fsia_ick);
602
603 /*
604 * FSIACK is connected to AK4642,
605 * and use external clock pin from it.
606 * it is parent of fsia_ick now.
607 */
608 fsiack = clk_get_parent(fsia_ick);
609 if (!fsiack)
610 goto fsia_ick_out;
611
612 /*
613 * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick
614 *
615 ** FIXME **
616 * Because the freq_table of external clk (fsiack) are all 0,
617 * the return value of clk_round_rate became 0.
618 * So, it use __fsi_set_rate here.
619 */
620 ret = __fsi_set_rate(fsiack, rate, enable);
621 if (ret < 0)
622 goto fsiack_out;
623
624 ret = __fsi_set_round_rate(fsia_ick, rate, enable);
625 if ((ret < 0) && enable)
626 __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */
627
628fsiack_out:
629 clk_put(fsiack);
630
631fsia_ick_out:
632 clk_put(fsia_ick);
633
634 return 0;
635}
636
637static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
638{
639 struct clk *fsib_clk;
640 struct clk *fdiv_clk = &sh7372_fsidivb_clk;
641 long fsib_rate = 0;
642 long fdiv_rate = 0;
643 int ackmd_bpfmd;
644 int ret;
645
646 switch (rate) {
647 case 44100:
648 fsib_rate = rate * 256;
649 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
650 break;
651 case 48000:
652 fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
653 fdiv_rate = rate * 256;
654 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
655 break;
656 default:
657 pr_err("unsupported rate in FSI2 port B\n");
658 return -EINVAL;
659 }
660
661 /* FSI B setting */
662 fsib_clk = clk_get(dev, "ickb");
663 if (IS_ERR(fsib_clk))
664 return -EIO;
665
666 ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
667 clk_put(fsib_clk);
668 if (ret < 0)
669 return ret;
670
671 /* FSI DIV setting */
672 ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
673 if (ret < 0) {
674 /* disable FSI B */
675 if (enable)
676 __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
677 return ret;
678 }
679
680 return ackmd_bpfmd;
681}
682
683static int fsi_set_rate(struct device *dev, int is_porta, int rate, int enable)
684{
685 int ret;
686
687 if (is_porta)
688 ret = fsi_ak4642_set_rate(dev, rate, enable);
689 else
690 ret = fsi_hdmi_set_rate(dev, rate, enable);
691
692 return ret;
693}
694
568static struct sh_fsi_platform_info fsi_info = { 695static struct sh_fsi_platform_info fsi_info = {
569 .porta_flags = SH_FSI_BRS_INV | 696 .porta_flags = SH_FSI_BRS_INV |
570 SH_FSI_OUT_SLAVE_MODE | 697 SH_FSI_OUT_SLAVE_MODE |
571 SH_FSI_IN_SLAVE_MODE | 698 SH_FSI_IN_SLAVE_MODE |
572 SH_FSI_OFMT(PCM) | 699 SH_FSI_OFMT(PCM) |
573 SH_FSI_IFMT(PCM), 700 SH_FSI_IFMT(PCM),
701
702 .portb_flags = SH_FSI_BRS_INV |
703 SH_FSI_BRM_INV |
704 SH_FSI_LRS_INV |
705 SH_FSI_OFMT(SPDIF),
706 .set_rate = fsi_set_rate,
574}; 707};
575 708
576static struct resource fsi_resources[] = { 709static struct resource fsi_resources[] = {
@@ -634,6 +767,7 @@ static struct platform_device lcdc1_device = {
634static struct sh_mobile_hdmi_info hdmi_info = { 767static struct sh_mobile_hdmi_info hdmi_info = {
635 .lcd_chan = &sh_mobile_lcdc1_info.ch[0], 768 .lcd_chan = &sh_mobile_lcdc1_info.ch[0],
636 .lcd_dev = &lcdc1_device.dev, 769 .lcd_dev = &lcdc1_device.dev,
770 .flags = HDMI_SND_SRC_SPDIF,
637}; 771};
638 772
639static struct resource hdmi_resources[] = { 773static struct resource hdmi_resources[] = {
@@ -835,6 +969,11 @@ static int __init hdmi_init_pm_clock(void)
835 goto out; 969 goto out;
836 } 970 }
837 971
972 ret = clk_enable(&sh7372_pllc2_clk);
973 if (ret < 0) {
974 pr_err("Cannot enable pllc2 clock\n");
975 goto out;
976 }
838 pr_debug("PLLC2 set frequency %lu\n", rate); 977 pr_debug("PLLC2 set frequency %lu\n", rate);
839 978
840 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk); 979 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
@@ -851,23 +990,11 @@ out:
851 990
852device_initcall(hdmi_init_pm_clock); 991device_initcall(hdmi_init_pm_clock);
853 992
854#define FSIACK_DUMMY_RATE 48000
855static int __init fsi_init_pm_clock(void) 993static int __init fsi_init_pm_clock(void)
856{ 994{
857 struct clk *fsia_ick; 995 struct clk *fsia_ick;
858 int ret; 996 int ret;
859 997
860 /*
861 * FSIACK is connected to AK4642,
862 * and the rate is depend on playing sound rate.
863 * So, set dummy rate (= 48k) here
864 */
865 ret = clk_set_rate(&sh7372_fsiack_clk, FSIACK_DUMMY_RATE);
866 if (ret < 0) {
867 pr_err("Cannot set FSIACK dummy rate: %d\n", ret);
868 return ret;
869 }
870
871 fsia_ick = clk_get(&fsi_device.dev, "icka"); 998 fsia_ick = clk_get(&fsi_device.dev, "icka");
872 if (IS_ERR(fsia_ick)) { 999 if (IS_ERR(fsia_ick)) {
873 ret = PTR_ERR(fsia_ick); 1000 ret = PTR_ERR(fsia_ick);
@@ -876,16 +1003,9 @@ static int __init fsi_init_pm_clock(void)
876 } 1003 }
877 1004
878 ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk); 1005 ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
879 if (ret < 0) {
880 pr_err("Cannot set FSI-A parent: %d\n", ret);
881 goto out;
882 }
883
884 ret = clk_set_rate(fsia_ick, FSIACK_DUMMY_RATE);
885 if (ret < 0) 1006 if (ret < 0)
886 pr_err("Cannot set FSI-A rate: %d\n", ret); 1007 pr_err("Cannot set FSI-A parent: %d\n", ret);
887 1008
888out:
889 clk_put(fsia_ick); 1009 clk_put(fsia_ick);
890 1010
891 return ret; 1011 return ret;
@@ -992,6 +1112,7 @@ static void __init ap4evb_map_io(void)
992 1112
993#define GPIO_PORT9CR 0xE6051009 1113#define GPIO_PORT9CR 0xE6051009
994#define GPIO_PORT10CR 0xE605100A 1114#define GPIO_PORT10CR 0xE605100A
1115#define USCCR1 0xE6058144
995static void __init ap4evb_init(void) 1116static void __init ap4evb_init(void)
996{ 1117{
997 u32 srcr4; 1118 u32 srcr4;
@@ -1062,7 +1183,7 @@ static void __init ap4evb_init(void)
1062 /* setup USB phy */ 1183 /* setup USB phy */
1063 __raw_writew(0x8a0a, 0xE6058130); /* USBCR2 */ 1184 __raw_writew(0x8a0a, 0xE6058130); /* USBCR2 */
1064 1185
1065 /* enable FSI2 */ 1186 /* enable FSI2 port A (ak4643) */
1066 gpio_request(GPIO_FN_FSIAIBT, NULL); 1187 gpio_request(GPIO_FN_FSIAIBT, NULL);
1067 gpio_request(GPIO_FN_FSIAILR, NULL); 1188 gpio_request(GPIO_FN_FSIAILR, NULL);
1068 gpio_request(GPIO_FN_FSIAISLD, NULL); 1189 gpio_request(GPIO_FN_FSIAISLD, NULL);
@@ -1079,6 +1200,10 @@ static void __init ap4evb_init(void)
1079 gpio_request(GPIO_PORT41, NULL); 1200 gpio_request(GPIO_PORT41, NULL);
1080 gpio_direction_input(GPIO_PORT41); 1201 gpio_direction_input(GPIO_PORT41);
1081 1202
1203 /* setup FSI2 port B (HDMI) */
1204 gpio_request(GPIO_FN_FSIBCK, NULL);
1205 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
1206
1082 /* set SPU2 clock to 119.6 MHz */ 1207 /* set SPU2 clock to 119.6 MHz */
1083 clk = clk_get(NULL, "spu_clk"); 1208 clk = clk_get(NULL, "spu_clk");
1084 if (!IS_ERR(clk)) { 1209 if (!IS_ERR(clk)) {
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 8565aefa21fd..3aa026069435 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -50,6 +50,9 @@
50#define SMSTPCR3 0xe615013c 50#define SMSTPCR3 0xe615013c
51#define SMSTPCR4 0xe6150140 51#define SMSTPCR4 0xe6150140
52 52
53#define FSIDIVA 0xFE1F8000
54#define FSIDIVB 0xFE1F8008
55
53/* Platforms must set frequency on their DV_CLKI pin */ 56/* Platforms must set frequency on their DV_CLKI pin */
54struct clk sh7372_dv_clki_clk = { 57struct clk sh7372_dv_clki_clk = {
55}; 58};
@@ -217,8 +220,7 @@ static void pllc2_disable(struct clk *clk)
217 __raw_writel(__raw_readl(PLLC2CR) & ~0x80000000, PLLC2CR); 220 __raw_writel(__raw_readl(PLLC2CR) & ~0x80000000, PLLC2CR);
218} 221}
219 222
220static int pllc2_set_rate(struct clk *clk, 223static int pllc2_set_rate(struct clk *clk, unsigned long rate)
221 unsigned long rate, int algo_id)
222{ 224{
223 unsigned long value; 225 unsigned long value;
224 int idx; 226 int idx;
@@ -227,21 +229,13 @@ static int pllc2_set_rate(struct clk *clk,
227 if (idx < 0) 229 if (idx < 0)
228 return idx; 230 return idx;
229 231
230 if (rate == clk->parent->rate) { 232 if (rate == clk->parent->rate)
231 pllc2_disable(clk); 233 return -EINVAL;
232 return 0;
233 }
234 234
235 value = __raw_readl(PLLC2CR) & ~(0x3f << 24); 235 value = __raw_readl(PLLC2CR) & ~(0x3f << 24);
236 236
237 if (value & 0x80000000)
238 pllc2_disable(clk);
239
240 __raw_writel((value & ~0x80000000) | ((idx + 19) << 24), PLLC2CR); 237 __raw_writel((value & ~0x80000000) | ((idx + 19) << 24), PLLC2CR);
241 238
242 if (value & 0x80000000)
243 return pllc2_enable(clk);
244
245 return 0; 239 return 0;
246} 240}
247 241
@@ -288,6 +282,7 @@ struct clk sh7372_pllc2_clk = {
288 .ops = &pllc2_clk_ops, 282 .ops = &pllc2_clk_ops,
289 .parent = &extal1_div2_clk, 283 .parent = &extal1_div2_clk,
290 .freq_table = pllc2_freq_table, 284 .freq_table = pllc2_freq_table,
285 .nr_freqs = ARRAY_SIZE(pllc2_freq_table) - 1,
291 .parent_table = pllc2_parent, 286 .parent_table = pllc2_parent,
292 .parent_num = ARRAY_SIZE(pllc2_parent), 287 .parent_num = ARRAY_SIZE(pllc2_parent),
293}; 288};
@@ -417,6 +412,93 @@ static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
417 fsibckcr_parent, ARRAY_SIZE(fsibckcr_parent), 6, 2), 412 fsibckcr_parent, ARRAY_SIZE(fsibckcr_parent), 6, 2),
418}; 413};
419 414
415/* FSI DIV */
416static unsigned long fsidiv_recalc(struct clk *clk)
417{
418 unsigned long value;
419
420 value = __raw_readl(clk->mapping->base);
421
422 if ((value & 0x3) != 0x3)
423 return 0;
424
425 value >>= 16;
426 if (value < 2)
427 return 0;
428
429 return clk->parent->rate / value;
430}
431
432static long fsidiv_round_rate(struct clk *clk, unsigned long rate)
433{
434 return clk_rate_div_range_round(clk, 2, 0xffff, rate);
435}
436
437static void fsidiv_disable(struct clk *clk)
438{
439 __raw_writel(0, clk->mapping->base);
440}
441
442static int fsidiv_enable(struct clk *clk)
443{
444 unsigned long value;
445
446 value = __raw_readl(clk->mapping->base) >> 16;
447 if (value < 2)
448 return -EIO;
449
450 __raw_writel((value << 16) | 0x3, clk->mapping->base);
451
452 return 0;
453}
454
455static int fsidiv_set_rate(struct clk *clk, unsigned long rate)
456{
457 int idx;
458
459 idx = (clk->parent->rate / rate) & 0xffff;
460 if (idx < 2)
461 return -EINVAL;
462
463 __raw_writel(idx << 16, clk->mapping->base);
464 return 0;
465}
466
467static struct clk_ops fsidiv_clk_ops = {
468 .recalc = fsidiv_recalc,
469 .round_rate = fsidiv_round_rate,
470 .set_rate = fsidiv_set_rate,
471 .enable = fsidiv_enable,
472 .disable = fsidiv_disable,
473};
474
475static struct clk_mapping sh7372_fsidiva_clk_mapping = {
476 .phys = FSIDIVA,
477 .len = 8,
478};
479
480struct clk sh7372_fsidiva_clk = {
481 .ops = &fsidiv_clk_ops,
482 .parent = &div6_reparent_clks[DIV6_FSIA], /* late install */
483 .mapping = &sh7372_fsidiva_clk_mapping,
484};
485
486static struct clk_mapping sh7372_fsidivb_clk_mapping = {
487 .phys = FSIDIVB,
488 .len = 8,
489};
490
491struct clk sh7372_fsidivb_clk = {
492 .ops = &fsidiv_clk_ops,
493 .parent = &div6_reparent_clks[DIV6_FSIB], /* late install */
494 .mapping = &sh7372_fsidivb_clk_mapping,
495};
496
497static struct clk *late_main_clks[] = {
498 &sh7372_fsidiva_clk,
499 &sh7372_fsidivb_clk,
500};
501
420enum { MSTP001, 502enum { MSTP001,
421 MSTP131, MSTP130, 503 MSTP131, MSTP130,
422 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, 504 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125,
@@ -510,8 +592,6 @@ static struct clk_lookup lookups[] = {
510 CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]), 592 CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]),
511 CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]), 593 CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]),
512 CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]), 594 CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]),
513 CLKDEV_CON_ID("fsia_clk", &div6_reparent_clks[DIV6_FSIA]),
514 CLKDEV_CON_ID("fsib_clk", &div6_reparent_clks[DIV6_FSIB]),
515 CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]), 595 CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]),
516 CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]), 596 CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),
517 CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]), 597 CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]),
@@ -548,8 +628,8 @@ static struct clk_lookup lookups[] = {
548 CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */ 628 CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
549 CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */ 629 CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */
550 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */ 630 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */
551 CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP323]), /* USB0 */ 631 CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USB0 */
552 CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP323]), /* USB0 */ 632 CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP322]), /* USB0 */
553 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ 633 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
554 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ 634 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
555 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */ 635 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */
@@ -585,6 +665,9 @@ void __init sh7372_clock_init(void)
585 if (!ret) 665 if (!ret)
586 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 666 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
587 667
668 for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
669 ret = clk_register(late_main_clks[k]);
670
588 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 671 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
589 672
590 if (!ret) 673 if (!ret)
diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S
index a285d13c7416..f428c4db2b60 100644
--- a/arch/arm/mach-shmobile/include/mach/entry-macro.S
+++ b/arch/arm/mach-shmobile/include/mach/entry-macro.S
@@ -1,4 +1,5 @@
1/* 1/*
2 * Copyright (C) 2010 Magnus Damm
2 * Copyright (C) 2008 Renesas Solutions Corp. 3 * Copyright (C) 2008 Renesas Solutions Corp.
3 * 4 *
4 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
@@ -14,24 +15,45 @@
14 * along with this program; if not, write to the Free Software 15 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
16 */ 17 */
17#include <mach/hardware.h>
18#include <mach/irqs.h> 18#include <mach/irqs.h>
19 19
20#define INTCA_BASE 0xe6980000
21#define INTFLGA_OFFS 0x00000018 /* accept pending interrupt */
22#define INTEVTA_OFFS 0x00000020 /* vector number of accepted interrupt */
23#define INTLVLA_OFFS 0x00000030 /* priority level of accepted interrupt */
24#define INTLVLB_OFFS 0x00000034 /* previous priority level */
25
20 .macro disable_fiq 26 .macro disable_fiq
21 .endm 27 .endm
22 28
23 .macro get_irqnr_preamble, base, tmp 29 .macro get_irqnr_preamble, base, tmp
24 ldr \base, =INTFLGA 30 ldr \base, =INTCA_BASE
25 .endm 31 .endm
26 32
27 .macro arch_ret_to_user, tmp1, tmp2 33 .macro arch_ret_to_user, tmp1, tmp2
28 .endm 34 .endm
29 35
30 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 36 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
31 ldr \irqnr, [\base] 37 /* The single INTFLGA read access below results in the following:
38 *
39 * 1. INTLVLB is updated with old priority value from INTLVLA
40 * 2. Highest priority interrupt is accepted
41 * 3. INTLVLA is updated to contain priority of accepted interrupt
42 * 4. Accepted interrupt vector is stored in INTFLGA and INTEVTA
43 */
44 ldr \irqnr, [\base, #INTFLGA_OFFS]
45
46 /* Restore INTLVLA with the value saved in INTLVLB.
47 * This is required to support interrupt priorities properly.
48 */
49 ldrb \tmp, [\base, #INTLVLB_OFFS]
50 strb \tmp, [\base, #INTLVLA_OFFS]
51
52 /* Handle invalid vector number case */
32 cmp \irqnr, #0 53 cmp \irqnr, #0
33 beq 1000f 54 beq 1000f
34 /* intevt to irq number */ 55
56 /* Convert vector to irq number, same as the evt2irq() macro */
35 lsr \irqnr, \irqnr, #0x5 57 lsr \irqnr, \irqnr, #0x5
36 subs \irqnr, \irqnr, #16 58 subs \irqnr, \irqnr, #16
37 59
diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/include/mach/gpio.h
index 5bc6bd444d72..2b1bb9e43dda 100644
--- a/arch/arm/mach-shmobile/include/mach/gpio.h
+++ b/arch/arm/mach-shmobile/include/mach/gpio.h
@@ -35,12 +35,12 @@ static inline int gpio_cansleep(unsigned gpio)
35 35
36static inline int gpio_to_irq(unsigned gpio) 36static inline int gpio_to_irq(unsigned gpio)
37{ 37{
38 return -ENOSYS; 38 return __gpio_to_irq(gpio);
39} 39}
40 40
41static inline int irq_to_gpio(unsigned int irq) 41static inline int irq_to_gpio(unsigned int irq)
42{ 42{
43 return -EINVAL; 43 return -ENOSYS;
44} 44}
45 45
46#endif /* CONFIG_GPIOLIB */ 46#endif /* CONFIG_GPIOLIB */
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
index 147775a94bce..e4f9004e7103 100644
--- a/arch/arm/mach-shmobile/include/mach/sh7372.h
+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
@@ -464,5 +464,7 @@ extern struct clk sh7372_dv_clki_div2_clk;
464extern struct clk sh7372_pllc2_clk; 464extern struct clk sh7372_pllc2_clk;
465extern struct clk sh7372_fsiack_clk; 465extern struct clk sh7372_fsiack_clk;
466extern struct clk sh7372_fsibck_clk; 466extern struct clk sh7372_fsibck_clk;
467extern struct clk sh7372_fsidiva_clk;
468extern struct clk sh7372_fsidivb_clk;
467 469
468#endif /* __ASM_SH7372_H__ */ 470#endif /* __ASM_SH7372_H__ */
diff --git a/arch/arm/mach-shmobile/include/mach/vmalloc.h b/arch/arm/mach-shmobile/include/mach/vmalloc.h
index 4aecf6e3a859..2b8fd8b942fe 100644
--- a/arch/arm/mach-shmobile/include/mach/vmalloc.h
+++ b/arch/arm/mach-shmobile/include/mach/vmalloc.h
@@ -2,6 +2,6 @@
2#define __ASM_MACH_VMALLOC_H 2#define __ASM_MACH_VMALLOC_H
3 3
4/* Vmalloc at ... - 0xe5ffffff */ 4/* Vmalloc at ... - 0xe5ffffff */
5#define VMALLOC_END 0xe6000000 5#define VMALLOC_END 0xe6000000UL
6 6
7#endif /* __ASM_MACH_VMALLOC_H */ 7#endif /* __ASM_MACH_VMALLOC_H */
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index 4cd3cae38e72..30b2f400666a 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -98,7 +98,7 @@ static struct intc_vect intca_vectors[] __initdata = {
98 INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0), 98 INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0),
99 INTC_VECT(IRQ16A, 0x3200), INTC_VECT(IRQ17A, 0x3220), 99 INTC_VECT(IRQ16A, 0x3200), INTC_VECT(IRQ17A, 0x3220),
100 INTC_VECT(IRQ18A, 0x3240), INTC_VECT(IRQ19A, 0x3260), 100 INTC_VECT(IRQ18A, 0x3240), INTC_VECT(IRQ19A, 0x3260),
101 INTC_VECT(IRQ20A, 0x3280), INTC_VECT(IRQ31A, 0x32a0), 101 INTC_VECT(IRQ20A, 0x3280), INTC_VECT(IRQ21A, 0x32a0),
102 INTC_VECT(IRQ22A, 0x32c0), INTC_VECT(IRQ23A, 0x32e0), 102 INTC_VECT(IRQ22A, 0x32c0), INTC_VECT(IRQ23A, 0x32e0),
103 INTC_VECT(IRQ24A, 0x3300), INTC_VECT(IRQ25A, 0x3320), 103 INTC_VECT(IRQ24A, 0x3300), INTC_VECT(IRQ25A, 0x3320),
104 INTC_VECT(IRQ26A, 0x3340), INTC_VECT(IRQ27A, 0x3360), 104 INTC_VECT(IRQ26A, 0x3340), INTC_VECT(IRQ27A, 0x3360),