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authorMagnus Damm <damm@opensource.se>2013-02-13 08:46:38 -0500
committerSimon Horman <horms+renesas@verge.net.au>2013-03-12 13:13:19 -0400
commitaa8d3bb177a3ba64407d98c75d5c6c5130ff2182 (patch)
treef054637c290a34c6ed08e2c3ae0f689fd47664a3 /arch/arm/mach-shmobile
parent10e8d4f6dddb0f9dc408c2f2bde8399b243a42ca (diff)
ARM: shmobile: Kill off sh73a0 scu_base_addr() function
Replace scu_base_addr() with a static shmobile_scu_base variable and introduce SH73A0_SCU_BASE. Later in the series the shmobile_scu_base variable will be made into a global variable so this is preparation only. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile')
-rw-r--r--arch/arm/mach-shmobile/smp-sh73a0.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index 81c0f4ba1846..0757f4a94bf5 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -39,13 +39,12 @@
39 39
40#define PSTR_SHUTDOWN_MODE 3 40#define PSTR_SHUTDOWN_MODE 3
41 41
42static void __iomem *scu_base_addr(void) 42#define SH73A0_SCU_BASE IOMEM(0xf0000000)
43{ 43
44 return (void __iomem *)0xf0000000; 44static void __iomem *shmobile_scu_base;
45}
46 45
47#ifdef CONFIG_HAVE_ARM_TWD 46#ifdef CONFIG_HAVE_ARM_TWD
48static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); 47static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, SH73A0_SCU_BASE + 0x600, 29);
49void __init sh73a0_register_twd(void) 48void __init sh73a0_register_twd(void)
50{ 49{
51 twd_local_timer_register(&twd_local_timer); 50 twd_local_timer_register(&twd_local_timer);
@@ -71,21 +70,22 @@ static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct
71 70
72static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus) 71static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
73{ 72{
74 scu_enable(scu_base_addr()); 73 scu_enable(shmobile_scu_base);
75 74
76 /* Map the reset vector (in headsmp-sh73a0.S) */ 75 /* Map the reset vector (in headsmp-sh73a0.S) */
77 __raw_writel(0, APARMBAREA); /* 4k */ 76 __raw_writel(0, APARMBAREA); /* 4k */
78 __raw_writel(__pa(sh73a0_secondary_vector), SBAR); 77 __raw_writel(__pa(sh73a0_secondary_vector), SBAR);
79 78
80 /* enable cache coherency on booting CPU */ 79 /* enable cache coherency on booting CPU */
81 scu_power_mode(scu_base_addr(), SCU_PM_NORMAL); 80 scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
82} 81}
83 82
84static void __init sh73a0_smp_init_cpus(void) 83static void __init sh73a0_smp_init_cpus(void)
85{ 84{
86 unsigned int ncores = scu_get_core_count(scu_base_addr()); 85 /* setup sh73a0 specific SCU base */
86 shmobile_scu_base = SH73A0_SCU_BASE;
87 87
88 shmobile_smp_init_cpus(ncores); 88 shmobile_smp_init_cpus(scu_get_core_count(shmobile_scu_base));
89} 89}
90 90
91#ifdef CONFIG_HOTPLUG_CPU 91#ifdef CONFIG_HOTPLUG_CPU
@@ -121,7 +121,7 @@ static void sh73a0_cpu_die(unsigned int cpu)
121 flush_cache_all(); 121 flush_cache_all();
122 122
123 /* Set power off mode. This takes the CPU out of the MP cluster */ 123 /* Set power off mode. This takes the CPU out of the MP cluster */
124 scu_power_mode(scu_base_addr(), SCU_PM_POWEROFF); 124 scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF);
125 125
126 /* Enter shutdown mode */ 126 /* Enter shutdown mode */
127 cpu_do_idle(); 127 cpu_do_idle();