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authorMagnus Damm <damm@opensource.se>2013-02-13 08:46:48 -0500
committerSimon Horman <horms+renesas@verge.net.au>2013-03-12 13:13:19 -0400
commit3b94afa38350ad5b592df5b6539a20a253e04b53 (patch)
tree9722a2cef4f6bf745b5f1757a4572dcaf07cef0a /arch/arm/mach-shmobile
parentaa8d3bb177a3ba64407d98c75d5c6c5130ff2182 (diff)
ARM: shmobile: Kill off r8a7779 scu_base_addr() function
Replace scu_base_addr() with a static shmobile_scu_base variable and introduce R8A7779_SCU_BASE. Later in the series the shmobile_scu_base variable will be made into a global variable so this is preparation only. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile')
-rw-r--r--arch/arm/mach-shmobile/smp-r8a7779.c17
1 files changed, 8 insertions, 9 deletions
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index f46b51658c3a..d92188d702ab 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -31,6 +31,9 @@
31#include <asm/smp_twd.h> 31#include <asm/smp_twd.h>
32 32
33#define AVECR IOMEM(0xfe700040) 33#define AVECR IOMEM(0xfe700040)
34#define R8A7779_SCU_BASE IOMEM(0xf0000000)
35
36static void __iomem *shmobile_scu_base;
34 37
35static struct r8a7779_pm_ch r8a7779_ch_cpu1 = { 38static struct r8a7779_pm_ch r8a7779_ch_cpu1 = {
36 .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ 39 .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
@@ -56,11 +59,6 @@ static struct r8a7779_pm_ch *r8a7779_ch_cpu[4] = {
56 [3] = &r8a7779_ch_cpu3, 59 [3] = &r8a7779_ch_cpu3,
57}; 60};
58 61
59static void __iomem *scu_base_addr(void)
60{
61 return (void __iomem *)0xf0000000;
62}
63
64static DEFINE_SPINLOCK(scu_lock); 62static DEFINE_SPINLOCK(scu_lock);
65static unsigned long tmp; 63static unsigned long tmp;
66 64
@@ -75,7 +73,7 @@ void __init r8a7779_register_twd(void)
75 73
76static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) 74static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
77{ 75{
78 void __iomem *scu_base = scu_base_addr(); 76 void __iomem *scu_base = shmobile_scu_base;
79 77
80 spin_lock(&scu_lock); 78 spin_lock(&scu_lock);
81 tmp = __raw_readl(scu_base + 8); 79 tmp = __raw_readl(scu_base + 8);
@@ -153,7 +151,7 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
153{ 151{
154 int cpu = cpu_logical_map(0); 152 int cpu = cpu_logical_map(0);
155 153
156 scu_enable(scu_base_addr()); 154 scu_enable(shmobile_scu_base);
157 155
158 /* Map the reset vector (in headsmp.S) */ 156 /* Map the reset vector (in headsmp.S) */
159 __raw_writel(__pa(shmobile_secondary_vector), AVECR); 157 __raw_writel(__pa(shmobile_secondary_vector), AVECR);
@@ -171,9 +169,10 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
171 169
172static void __init r8a7779_smp_init_cpus(void) 170static void __init r8a7779_smp_init_cpus(void)
173{ 171{
174 unsigned int ncores = scu_get_core_count(scu_base_addr()); 172 /* setup r8a7779 specific SCU base */
173 shmobile_scu_base = R8A7779_SCU_BASE;
175 174
176 shmobile_smp_init_cpus(ncores); 175 shmobile_smp_init_cpus(scu_get_core_count(shmobile_scu_base));
177} 176}
178 177
179struct smp_operations r8a7779_smp_ops __initdata = { 178struct smp_operations r8a7779_smp_ops __initdata = {