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author | Guennadi Liakhovetski <g.liakhovetski@gmx.de> | 2010-05-23 12:39:17 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2010-05-23 19:54:25 -0400 |
commit | eb6e8605ee5f5b4e116451bf01b3f35eac446dde (patch) | |
tree | cd4381ff4cb4d0ea7db4da1f27606aec7d54fe4f /arch/arm/mach-shmobile | |
parent | d1d4b10cdafb8dd4044a3b67b05f759047612fdc (diff) |
ARM: mach-shmobile: SH7372 has 6 SCIFA and 1 SCIFB ports
The current SH7372 setup code registers 7 SCIF ports, which is wrong.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/arm/mach-shmobile')
-rw-r--r-- | arch/arm/mach-shmobile/setup-sh7372.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c index d6b15648d8b0..d1a8095a19eb 100644 --- a/arch/arm/mach-shmobile/setup-sh7372.c +++ b/arch/arm/mach-shmobile/setup-sh7372.c | |||
@@ -36,7 +36,7 @@ | |||
36 | static struct plat_sci_port scif0_platform_data = { | 36 | static struct plat_sci_port scif0_platform_data = { |
37 | .mapbase = 0xe6c40000, | 37 | .mapbase = 0xe6c40000, |
38 | .flags = UPF_BOOT_AUTOCONF, | 38 | .flags = UPF_BOOT_AUTOCONF, |
39 | .type = PORT_SCIF, | 39 | .type = PORT_SCIFA, |
40 | .irqs = { evt2irq(0x0c00), evt2irq(0x0c00), | 40 | .irqs = { evt2irq(0x0c00), evt2irq(0x0c00), |
41 | evt2irq(0x0c00), evt2irq(0x0c00) }, | 41 | evt2irq(0x0c00), evt2irq(0x0c00) }, |
42 | }; | 42 | }; |
@@ -53,7 +53,7 @@ static struct platform_device scif0_device = { | |||
53 | static struct plat_sci_port scif1_platform_data = { | 53 | static struct plat_sci_port scif1_platform_data = { |
54 | .mapbase = 0xe6c50000, | 54 | .mapbase = 0xe6c50000, |
55 | .flags = UPF_BOOT_AUTOCONF, | 55 | .flags = UPF_BOOT_AUTOCONF, |
56 | .type = PORT_SCIF, | 56 | .type = PORT_SCIFA, |
57 | .irqs = { evt2irq(0x0c20), evt2irq(0x0c20), | 57 | .irqs = { evt2irq(0x0c20), evt2irq(0x0c20), |
58 | evt2irq(0x0c20), evt2irq(0x0c20) }, | 58 | evt2irq(0x0c20), evt2irq(0x0c20) }, |
59 | }; | 59 | }; |
@@ -70,7 +70,7 @@ static struct platform_device scif1_device = { | |||
70 | static struct plat_sci_port scif2_platform_data = { | 70 | static struct plat_sci_port scif2_platform_data = { |
71 | .mapbase = 0xe6c60000, | 71 | .mapbase = 0xe6c60000, |
72 | .flags = UPF_BOOT_AUTOCONF, | 72 | .flags = UPF_BOOT_AUTOCONF, |
73 | .type = PORT_SCIF, | 73 | .type = PORT_SCIFA, |
74 | .irqs = { evt2irq(0x0c40), evt2irq(0x0c40), | 74 | .irqs = { evt2irq(0x0c40), evt2irq(0x0c40), |
75 | evt2irq(0x0c40), evt2irq(0x0c40) }, | 75 | evt2irq(0x0c40), evt2irq(0x0c40) }, |
76 | }; | 76 | }; |
@@ -87,7 +87,7 @@ static struct platform_device scif2_device = { | |||
87 | static struct plat_sci_port scif3_platform_data = { | 87 | static struct plat_sci_port scif3_platform_data = { |
88 | .mapbase = 0xe6c70000, | 88 | .mapbase = 0xe6c70000, |
89 | .flags = UPF_BOOT_AUTOCONF, | 89 | .flags = UPF_BOOT_AUTOCONF, |
90 | .type = PORT_SCIF, | 90 | .type = PORT_SCIFA, |
91 | .irqs = { evt2irq(0x0c60), evt2irq(0x0c60), | 91 | .irqs = { evt2irq(0x0c60), evt2irq(0x0c60), |
92 | evt2irq(0x0c60), evt2irq(0x0c60) }, | 92 | evt2irq(0x0c60), evt2irq(0x0c60) }, |
93 | }; | 93 | }; |
@@ -104,7 +104,7 @@ static struct platform_device scif3_device = { | |||
104 | static struct plat_sci_port scif4_platform_data = { | 104 | static struct plat_sci_port scif4_platform_data = { |
105 | .mapbase = 0xe6c80000, | 105 | .mapbase = 0xe6c80000, |
106 | .flags = UPF_BOOT_AUTOCONF, | 106 | .flags = UPF_BOOT_AUTOCONF, |
107 | .type = PORT_SCIF, | 107 | .type = PORT_SCIFA, |
108 | .irqs = { evt2irq(0x0d20), evt2irq(0x0d20), | 108 | .irqs = { evt2irq(0x0d20), evt2irq(0x0d20), |
109 | evt2irq(0x0d20), evt2irq(0x0d20) }, | 109 | evt2irq(0x0d20), evt2irq(0x0d20) }, |
110 | }; | 110 | }; |
@@ -121,7 +121,7 @@ static struct platform_device scif4_device = { | |||
121 | static struct plat_sci_port scif5_platform_data = { | 121 | static struct plat_sci_port scif5_platform_data = { |
122 | .mapbase = 0xe6cb0000, | 122 | .mapbase = 0xe6cb0000, |
123 | .flags = UPF_BOOT_AUTOCONF, | 123 | .flags = UPF_BOOT_AUTOCONF, |
124 | .type = PORT_SCIF, | 124 | .type = PORT_SCIFA, |
125 | .irqs = { evt2irq(0x0d40), evt2irq(0x0d40), | 125 | .irqs = { evt2irq(0x0d40), evt2irq(0x0d40), |
126 | evt2irq(0x0d40), evt2irq(0x0d40) }, | 126 | evt2irq(0x0d40), evt2irq(0x0d40) }, |
127 | }; | 127 | }; |
@@ -138,7 +138,7 @@ static struct platform_device scif5_device = { | |||
138 | static struct plat_sci_port scif6_platform_data = { | 138 | static struct plat_sci_port scif6_platform_data = { |
139 | .mapbase = 0xe6c30000, | 139 | .mapbase = 0xe6c30000, |
140 | .flags = UPF_BOOT_AUTOCONF, | 140 | .flags = UPF_BOOT_AUTOCONF, |
141 | .type = PORT_SCIF, | 141 | .type = PORT_SCIFB, |
142 | .irqs = { evt2irq(0x0d60), evt2irq(0x0d60), | 142 | .irqs = { evt2irq(0x0d60), evt2irq(0x0d60), |
143 | evt2irq(0x0d60), evt2irq(0x0d60) }, | 143 | evt2irq(0x0d60), evt2irq(0x0d60) }, |
144 | }; | 144 | }; |