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authorLinus Torvalds <torvalds@linux-foundation.org>2012-01-17 21:40:24 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-01-17 21:40:24 -0500
commit57f2685c16fa8e0cb86e4bc7c8ac33bfed943819 (patch)
tree96a42fe632687c8486c250c4805bf1d4c9c34d19 /arch/arm/mach-shmobile
parent488a9d018256dc9f29e041c0360445b6d25eea9a (diff)
parente08b881a69d638175bfa99b5af4d72b731633ea7 (diff)
Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dma
* 'next' of git://git.infradead.org/users/vkoul/slave-dma: (53 commits) ARM: mach-shmobile: specify CHCLR registers on SH7372 dma: shdma: fix runtime PM: clear channel buffers on reset dma/imx-sdma: save irq flags when use spin_lock in sdma_tx_submit dmaengine/ste_dma40: clear LNK on channel startup dmaengine: intel_mid_dma: remove legacy pm interface ASoC: mxs: correct 'direction' of device_prep_dma_cyclic dmaengine: intel_mid_dma: error path fix dmaengine: intel_mid_dma: locking and freeing fixes mtd: gpmi-nand: move to dma_transfer_direction mtd: fix compile error for gpmi-nand mmc: mxs-mmc: fix the dma_transfer_direction migration dmaengine: add DMA_TRANS_NONE to dma_transfer_direction dma: mxs-dma: Don't use CLKGATE bits in CTRL0 to disable DMA channels dma: mxs-dma: make mxs_dma_prep_slave_sg() multi user safe dma: mxs-dma: Always leave mxs_dma_init() with the clock disabled. dma: mxs-dma: fix a typo in comment DMA: PL330: Remove pm_runtime_xxx calls from pl330 probe/remove video i.MX IPU: Fix display connections i.MX IPU DMA: Fix wrong burstsize settings dmaengine/ste_dma40: allow fixed physical channel ... Fix up conflicts in drivers/dma/{Kconfig,mxs-dma.c,pl330.c} The conflicts looked pretty trivial, but I'll ask people to verify them.
Diffstat (limited to 'arch/arm/mach-shmobile')
-rw-r--r--arch/arm/mach-shmobile/setup-sh7372.c15
1 files changed, 12 insertions, 3 deletions
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 1ea89be63e29..6fcf304d3cdf 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -445,31 +445,39 @@ static const struct sh_dmae_slave_config sh7372_dmae_slaves[] = {
445 }, 445 },
446}; 446};
447 447
448#define SH7372_CHCLR 0x220
449
448static const struct sh_dmae_channel sh7372_dmae_channels[] = { 450static const struct sh_dmae_channel sh7372_dmae_channels[] = {
449 { 451 {
450 .offset = 0, 452 .offset = 0,
451 .dmars = 0, 453 .dmars = 0,
452 .dmars_bit = 0, 454 .dmars_bit = 0,
455 .chclr_offset = SH7372_CHCLR + 0,
453 }, { 456 }, {
454 .offset = 0x10, 457 .offset = 0x10,
455 .dmars = 0, 458 .dmars = 0,
456 .dmars_bit = 8, 459 .dmars_bit = 8,
460 .chclr_offset = SH7372_CHCLR + 0x10,
457 }, { 461 }, {
458 .offset = 0x20, 462 .offset = 0x20,
459 .dmars = 4, 463 .dmars = 4,
460 .dmars_bit = 0, 464 .dmars_bit = 0,
465 .chclr_offset = SH7372_CHCLR + 0x20,
461 }, { 466 }, {
462 .offset = 0x30, 467 .offset = 0x30,
463 .dmars = 4, 468 .dmars = 4,
464 .dmars_bit = 8, 469 .dmars_bit = 8,
470 .chclr_offset = SH7372_CHCLR + 0x30,
465 }, { 471 }, {
466 .offset = 0x50, 472 .offset = 0x50,
467 .dmars = 8, 473 .dmars = 8,
468 .dmars_bit = 0, 474 .dmars_bit = 0,
475 .chclr_offset = SH7372_CHCLR + 0x50,
469 }, { 476 }, {
470 .offset = 0x60, 477 .offset = 0x60,
471 .dmars = 8, 478 .dmars = 8,
472 .dmars_bit = 8, 479 .dmars_bit = 8,
480 .chclr_offset = SH7372_CHCLR + 0x60,
473 } 481 }
474}; 482};
475 483
@@ -487,6 +495,7 @@ static struct sh_dmae_pdata dma_platform_data = {
487 .ts_shift = ts_shift, 495 .ts_shift = ts_shift,
488 .ts_shift_num = ARRAY_SIZE(ts_shift), 496 .ts_shift_num = ARRAY_SIZE(ts_shift),
489 .dmaor_init = DMAOR_DME, 497 .dmaor_init = DMAOR_DME,
498 .chclr_present = 1,
490}; 499};
491 500
492/* Resource order important! */ 501/* Resource order important! */
@@ -494,7 +503,7 @@ static struct resource sh7372_dmae0_resources[] = {
494 { 503 {
495 /* Channel registers and DMAOR */ 504 /* Channel registers and DMAOR */
496 .start = 0xfe008020, 505 .start = 0xfe008020,
497 .end = 0xfe00808f, 506 .end = 0xfe00828f,
498 .flags = IORESOURCE_MEM, 507 .flags = IORESOURCE_MEM,
499 }, 508 },
500 { 509 {
@@ -522,7 +531,7 @@ static struct resource sh7372_dmae1_resources[] = {
522 { 531 {
523 /* Channel registers and DMAOR */ 532 /* Channel registers and DMAOR */
524 .start = 0xfe018020, 533 .start = 0xfe018020,
525 .end = 0xfe01808f, 534 .end = 0xfe01828f,
526 .flags = IORESOURCE_MEM, 535 .flags = IORESOURCE_MEM,
527 }, 536 },
528 { 537 {
@@ -550,7 +559,7 @@ static struct resource sh7372_dmae2_resources[] = {
550 { 559 {
551 /* Channel registers and DMAOR */ 560 /* Channel registers and DMAOR */
552 .start = 0xfe028020, 561 .start = 0xfe028020,
553 .end = 0xfe02808f, 562 .end = 0xfe02828f,
554 .flags = IORESOURCE_MEM, 563 .flags = IORESOURCE_MEM,
555 }, 564 },
556 { 565 {