diff options
author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2013-04-04 14:55:46 -0400 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2013-04-04 21:57:05 -0400 |
commit | 524219146a89aee5366326c225ccd71231419d89 (patch) | |
tree | df1c53c656a906295eb8d2a8267d2ef4ce78aa71 /arch/arm/mach-shmobile | |
parent | 3a42fa20aba327857a5454aeecf54f38d4212a66 (diff) |
ARM: shmobile: R8A7778: add Ether support
Add Ether clock and platform device for R8A7778 SoC; add a function to register
this device with board-specific platform data.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile')
-rw-r--r-- | arch/arm/mach-shmobile/clock-r8a7778.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/include/mach/r8a7778.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/setup-r8a7778.c | 15 |
3 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c index f1277f45381e..cd6855290b1f 100644 --- a/arch/arm/mach-shmobile/clock-r8a7778.c +++ b/arch/arm/mach-shmobile/clock-r8a7778.c | |||
@@ -58,11 +58,13 @@ static struct clk *main_clks[] = { | |||
58 | }; | 58 | }; |
59 | 59 | ||
60 | enum { | 60 | enum { |
61 | MSTP114, | ||
61 | MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, | 62 | MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, |
62 | MSTP016, MSTP015, | 63 | MSTP016, MSTP015, |
63 | MSTP_NR }; | 64 | MSTP_NR }; |
64 | 65 | ||
65 | static struct clk mstp_clks[MSTP_NR] = { | 66 | static struct clk mstp_clks[MSTP_NR] = { |
67 | [MSTP114] = SH_CLK_MSTP32(&clkp, MSTPCR1, 14, 0), /* Ether */ | ||
66 | [MSTP026] = SH_CLK_MSTP32(&clkp, MSTPCR0, 26, 0), /* SCIF0 */ | 68 | [MSTP026] = SH_CLK_MSTP32(&clkp, MSTPCR0, 26, 0), /* SCIF0 */ |
67 | [MSTP025] = SH_CLK_MSTP32(&clkp, MSTPCR0, 25, 0), /* SCIF1 */ | 69 | [MSTP025] = SH_CLK_MSTP32(&clkp, MSTPCR0, 25, 0), /* SCIF1 */ |
68 | [MSTP024] = SH_CLK_MSTP32(&clkp, MSTPCR0, 24, 0), /* SCIF2 */ | 70 | [MSTP024] = SH_CLK_MSTP32(&clkp, MSTPCR0, 24, 0), /* SCIF2 */ |
@@ -75,6 +77,7 @@ static struct clk mstp_clks[MSTP_NR] = { | |||
75 | 77 | ||
76 | static struct clk_lookup lookups[] = { | 78 | static struct clk_lookup lookups[] = { |
77 | /* MSTP32 clocks */ | 79 | /* MSTP32 clocks */ |
80 | CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */ | ||
78 | CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */ | 81 | CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */ |
79 | CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */ | 82 | CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */ |
80 | CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */ | 83 | CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */ |
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h index e0c620571c33..951149e6bcca 100644 --- a/arch/arm/mach-shmobile/include/mach/r8a7778.h +++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h | |||
@@ -18,8 +18,11 @@ | |||
18 | #ifndef __ASM_R8A7778_H__ | 18 | #ifndef __ASM_R8A7778_H__ |
19 | #define __ASM_R8A7778_H__ | 19 | #define __ASM_R8A7778_H__ |
20 | 20 | ||
21 | #include <linux/sh_eth.h> | ||
22 | |||
21 | extern void r8a7778_add_standard_devices(void); | 23 | extern void r8a7778_add_standard_devices(void); |
22 | extern void r8a7778_add_standard_devices_dt(void); | 24 | extern void r8a7778_add_standard_devices_dt(void); |
25 | extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata); | ||
23 | extern void r8a7778_init_delay(void); | 26 | extern void r8a7778_init_delay(void); |
24 | extern void r8a7778_init_irq(void); | 27 | extern void r8a7778_init_irq(void); |
25 | extern void r8a7778_init_irq_dt(void); | 28 | extern void r8a7778_init_irq_dt(void); |
diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c index 288230540d19..30b4a336308f 100644 --- a/arch/arm/mach-shmobile/setup-r8a7778.c +++ b/arch/arm/mach-shmobile/setup-r8a7778.c | |||
@@ -3,6 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Copyright (C) 2013 Renesas Solutions Corp. | 4 | * Copyright (C) 2013 Renesas Solutions Corp. |
5 | * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 5 | * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> |
6 | * Copyright (C) 2013 Cogent Embedded, Inc. | ||
6 | * | 7 | * |
7 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License as published by |
@@ -79,6 +80,12 @@ static struct sh_timer_config sh_tmu1_platform_data = { | |||
79 | .clocksource_rating = 200, | 80 | .clocksource_rating = 200, |
80 | }; | 81 | }; |
81 | 82 | ||
83 | /* Ether */ | ||
84 | static struct resource ether_resources[] = { | ||
85 | DEFINE_RES_MEM(0xfde00000, 0x400), | ||
86 | DEFINE_RES_IRQ(gic_iid(0x89)), | ||
87 | }; | ||
88 | |||
82 | #define r8a7778_register_tmu(idx) \ | 89 | #define r8a7778_register_tmu(idx) \ |
83 | platform_device_register_resndata( \ | 90 | platform_device_register_resndata( \ |
84 | &platform_bus, "sh_tmu", idx, \ | 91 | &platform_bus, "sh_tmu", idx, \ |
@@ -111,6 +118,14 @@ void __init r8a7778_add_standard_devices(void) | |||
111 | r8a7778_register_tmu(1); | 118 | r8a7778_register_tmu(1); |
112 | } | 119 | } |
113 | 120 | ||
121 | void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata) | ||
122 | { | ||
123 | platform_device_register_resndata(&platform_bus, "sh_eth", -1, | ||
124 | ether_resources, | ||
125 | ARRAY_SIZE(ether_resources), | ||
126 | pdata, sizeof(*pdata)); | ||
127 | } | ||
128 | |||
114 | static struct renesas_intc_irqpin_config irqpin_platform_data = { | 129 | static struct renesas_intc_irqpin_config irqpin_platform_data = { |
115 | .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */ | 130 | .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */ |
116 | .sense_bitfield_width = 2, | 131 | .sense_bitfield_width = 2, |