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authorMagnus Damm <damm@opensource.se>2011-12-13 11:36:22 -0500
committerPaul Mundt <lethal@linux-sh.org>2012-01-08 20:17:53 -0500
commit19c43fc53870e772084bb778f2bb3c949bf9a3b7 (patch)
treee8f0a1b72ae53595aa9a63d5bd3a1e9351584ec5 /arch/arm/mach-shmobile
parentf411fade0085a0d2c080bd64e72e0aff55bcbd09 (diff)
ARM: mach-shmobile: r8a7779 PFC GPIO-only support V2
Add GPIO-only r8a7779 PFC support V2. Only regular GPIOs are supported at this time. GPIO_FN are not supported because they require variable bit width support in be the shared pfc code. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/arm/mach-shmobile')
-rw-r--r--arch/arm/mach-shmobile/Kconfig2
-rw-r--r--arch/arm/mach-shmobile/Makefile1
-rw-r--r--arch/arm/mach-shmobile/board-marzen.c2
-rw-r--r--arch/arm/mach-shmobile/include/mach/common.h1
-rw-r--r--arch/arm/mach-shmobile/include/mach/r8a7779.h63
-rw-r--r--arch/arm/mach-shmobile/pfc-r8a7779.c472
6 files changed, 540 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 23e59b41d500..ee4cb420726d 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -39,6 +39,7 @@ config ARCH_R8A7779
39 select CPU_V7 39 select CPU_V7
40 select SH_CLK_CPG 40 select SH_CLK_CPG
41 select ARM_GIC 41 select ARM_GIC
42 select ARCH_WANT_OPTIONAL_GPIOLIB
42 43
43comment "SH-Mobile Board Type" 44comment "SH-Mobile Board Type"
44 45
@@ -90,6 +91,7 @@ config MACH_KOTA2
90config MACH_MARZEN 91config MACH_MARZEN
91 bool "MARZEN board" 92 bool "MARZEN board"
92 depends on ARCH_R8A7779 93 depends on ARCH_R8A7779
94 select ARCH_REQUIRE_GPIOLIB
93 95
94comment "SH-Mobile System Configuration" 96comment "SH-Mobile System Configuration"
95 97
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 04c97455e640..6f6ef3ad4db1 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -26,6 +26,7 @@ pfc-$(CONFIG_ARCH_SH7377) += pfc-sh7377.o
26pfc-$(CONFIG_ARCH_SH7372) += pfc-sh7372.o 26pfc-$(CONFIG_ARCH_SH7372) += pfc-sh7372.o
27pfc-$(CONFIG_ARCH_SH73A0) += pfc-sh73a0.o 27pfc-$(CONFIG_ARCH_SH73A0) += pfc-sh73a0.o
28pfc-$(CONFIG_ARCH_R8A7740) += pfc-r8a7740.o 28pfc-$(CONFIG_ARCH_R8A7740) += pfc-r8a7740.o
29pfc-$(CONFIG_ARCH_R8A7779) += pfc-r8a7779.o
29 30
30# IRQ objects 31# IRQ objects
31obj-$(CONFIG_ARCH_SH7367) += entry-intc.o 32obj-$(CONFIG_ARCH_SH7367) += entry-intc.o
diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
index d958cd49917f..0ea8b489e7e9 100644
--- a/arch/arm/mach-shmobile/board-marzen.c
+++ b/arch/arm/mach-shmobile/board-marzen.c
@@ -84,6 +84,8 @@ static void __init marzen_init_early(void)
84 84
85static void __init marzen_init(void) 85static void __init marzen_init(void)
86{ 86{
87 r8a7779_pinmux_init();
88
87 r8a7779_add_standard_devices(); 89 r8a7779_add_standard_devices();
88 platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices)); 90 platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
89} 91}
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index ba889edf644a..65e954b08774 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -64,5 +64,6 @@ extern void r8a7779_init_irq(void);
64extern void r8a7779_add_early_devices(void); 64extern void r8a7779_add_early_devices(void);
65extern void r8a7779_add_standard_devices(void); 65extern void r8a7779_add_standard_devices(void);
66extern void r8a7779_clock_init(void); 66extern void r8a7779_clock_init(void);
67extern void r8a7779_pinmux_init(void);
67 68
68#endif /* __ARCH_MACH_COMMON_H */ 69#endif /* __ARCH_MACH_COMMON_H */
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
index 17d944845982..6ac4cc1f9308 100644
--- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
+++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
@@ -1,6 +1,67 @@
1#ifndef __ASM_R8A7779_H__ 1#ifndef __ASM_R8A7779_H__
2#define __ASM_R8A7779_H__ 2#define __ASM_R8A7779_H__
3 3
4/* Nothing at this point */ 4/* Pin Function Controller:
5 * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU
6 */
7enum {
8 GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,
9 GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,
10 GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,
11 GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,
12 GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,
13 GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,
14 GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,
15 GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,
16
17 GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,
18 GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,
19 GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,
20 GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,
21 GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,
22 GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,
23 GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27,
24 GPIO_GP_1_28, GPIO_GP_1_29, GPIO_GP_1_30, GPIO_GP_1_31,
25
26 GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,
27 GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,
28 GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,
29 GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,
30 GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,
31 GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,
32 GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,
33 GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,
34
35 GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,
36 GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,
37 GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,
38 GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,
39 GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,
40 GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,
41 GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,
42 GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,
43
44 GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,
45 GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,
46 GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,
47 GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,
48 GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,
49 GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,
50 GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,
51 GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,
52
53 GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,
54 GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,
55 GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,
56 GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,
57 GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,
58 GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,
59 GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,
60 GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31,
61
62 GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,
63 GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,
64 GPIO_GP_6_8,
65};
5 66
6#endif /* __ASM_R8A7779_H__ */ 67#endif /* __ASM_R8A7779_H__ */
diff --git a/arch/arm/mach-shmobile/pfc-r8a7779.c b/arch/arm/mach-shmobile/pfc-r8a7779.c
new file mode 100644
index 000000000000..582fc11413db
--- /dev/null
+++ b/arch/arm/mach-shmobile/pfc-r8a7779.c
@@ -0,0 +1,472 @@
1/*
2 * r8a7779 processor support - PFC hardware block
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Copyright (C) 2011 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/gpio.h>
23#include <linux/ioport.h>
24#include <mach/r8a7779.h>
25
26#define CPU_32_PORT(fn, pfx, sfx) \
27 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
28 PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \
29 PORT_1(fn, pfx##31, sfx)
30
31#define CPU_32_PORT6(fn, pfx, sfx) \
32 PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \
33 PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \
34 PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \
35 PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \
36 PORT_1(fn, pfx##8, sfx)
37
38#define CPU_ALL_PORT(fn, pfx, sfx) \
39 CPU_32_PORT(fn, pfx##_0_, sfx), \
40 CPU_32_PORT(fn, pfx##_1_, sfx), \
41 CPU_32_PORT(fn, pfx##_2_, sfx), \
42 CPU_32_PORT(fn, pfx##_3_, sfx), \
43 CPU_32_PORT(fn, pfx##_4_, sfx), \
44 CPU_32_PORT(fn, pfx##_5_, sfx), \
45 CPU_32_PORT6(fn, pfx##_6_, sfx)
46
47#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)
48#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \
49 GP##pfx##_IN, GP##pfx##_OUT)
50
51#define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT
52#define _GP_INDT(pfx, sfx) GP##pfx##_DATA
53
54#define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str)
55#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused)
56#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused)
57
58
59#define PORT_10_REV(fn, pfx, sfx) \
60 PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \
61 PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \
62 PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \
63 PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \
64 PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
65
66#define CPU_32_PORT_REV(fn, pfx, sfx) \
67 PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \
68 PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \
69 PORT_10_REV(fn, pfx, sfx)
70
71#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused)
72#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused)
73
74enum {
75 PINMUX_RESERVED = 0,
76
77 PINMUX_DATA_BEGIN,
78 GP_ALL(DATA), /* GP_0_0_DATA -> GP_6_8_DATA */
79 PINMUX_DATA_END,
80
81 PINMUX_INPUT_BEGIN,
82 GP_ALL(IN), /* GP_0_0_IN -> GP_6_8_IN */
83 PINMUX_INPUT_END,
84
85 PINMUX_OUTPUT_BEGIN,
86 GP_ALL(OUT), /* GP_0_0_OUT -> GP_6_8_OUT */
87 PINMUX_OUTPUT_END,
88
89 PINMUX_FUNCTION_BEGIN,
90 GP_ALL(FN), /* GP_0_0_FN -> GP_6_8_FN */
91
92 /* GPSR0 */
93 FN_AVS1, FN_AVS2, FN_IP0_7_6, FN_A17,
94 FN_A18, FN_A19, FN_IP0_9_8, FN_IP0_11_10,
95 FN_IP0_13_12, FN_IP0_15_14, FN_IP0_18_16, FN_IP0_22_19,
96 FN_IP0_24_23, FN_IP0_25, FN_IP0_27_26, FN_IP1_1_0,
97 FN_IP1_3_2, FN_IP1_6_4, FN_IP1_10_7, FN_IP1_14_11,
98 FN_IP1_18_15, FN_IP0_5_3, FN_IP0_30_28, FN_IP2_18_16,
99 FN_IP2_21_19, FN_IP2_30_28, FN_IP3_2_0, FN_IP3_11_9,
100 FN_IP3_14_12, FN_IP3_22_21, FN_IP3_26_24, FN_IP3_31_29,
101
102 /* GPSR1 */
103 FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5, FN_IP4_10_8,
104 FN_IP4_11, FN_IP4_12, FN_IP4_13, FN_IP4_14,
105 FN_IP4_15, FN_IP4_16, FN_IP4_19_17, FN_IP4_22_20,
106 FN_IP4_23, FN_IP4_24, FN_IP4_25, FN_IP4_26,
107 FN_IP4_27, FN_IP4_28, FN_IP4_31_29, FN_IP5_2_0,
108 FN_IP5_3, FN_IP5_4, FN_IP5_5, FN_IP5_6,
109 FN_IP5_7, FN_IP5_8, FN_IP5_10_9, FN_IP5_12_11,
110 FN_IP5_14_13, FN_IP5_16_15, FN_IP5_20_17, FN_IP5_23_21,
111
112 /* GPSR2 */
113 FN_IP5_27_24, FN_IP8_20, FN_IP8_22_21, FN_IP8_24_23,
114 FN_IP8_27_25, FN_IP8_30_28, FN_IP9_1_0, FN_IP9_3_2,
115 FN_IP9_4, FN_IP9_5, FN_IP9_6, FN_IP9_7,
116 FN_IP9_9_8, FN_IP9_11_10, FN_IP9_13_12, FN_IP9_15_14,
117 FN_IP9_18_16, FN_IP9_21_19, FN_IP9_23_22, FN_IP9_25_24,
118 FN_IP9_27_26, FN_IP9_29_28, FN_IP10_2_0, FN_IP10_5_3,
119 FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_17_15,
120 FN_IP10_20_18, FN_IP10_23_21, FN_IP10_25_24, FN_IP10_28_26,
121
122 /* GPSR3 */
123 FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6,
124 FN_IP11_11_9, FN_IP11_14_12, FN_IP11_17_15, FN_IP11_20_18,
125 FN_IP11_23_21, FN_IP11_26_24, FN_IP11_29_27, FN_IP12_2_0,
126 FN_IP12_5_3, FN_IP12_8_6, FN_IP12_11_9, FN_IP12_14_12,
127 FN_IP12_17_15, FN_IP7_16_15, FN_IP7_18_17, FN_IP7_28_27,
128 FN_IP7_30_29, FN_IP7_20_19, FN_IP7_22_21, FN_IP7_24_23,
129 FN_IP7_26_25, FN_IP1_20_19, FN_IP1_22_21, FN_IP1_24_23,
130 FN_IP5_28, FN_IP5_30_29, FN_IP6_1_0, FN_IP6_3_2,
131
132 /* GPSR4 */
133 FN_IP6_5_4, FN_IP6_7_6, FN_IP6_8, FN_IP6_11_9,
134 FN_IP6_14_12, FN_IP6_17_15, FN_IP6_19_18, FN_IP6_22_20,
135 FN_IP6_24_23, FN_IP6_26_25, FN_IP6_30_29, FN_IP7_1_0,
136 FN_IP7_3_2, FN_IP7_6_4, FN_IP7_9_7, FN_IP7_12_10,
137 FN_IP7_14_13, FN_IP2_7_4, FN_IP2_11_8, FN_IP2_15_12,
138 FN_IP1_28_25, FN_IP2_3_0, FN_IP8_3_0, FN_IP8_7_4,
139 FN_IP8_11_8, FN_IP8_15_12, FN_PENC0, FN_PENC1,
140 FN_IP0_2_0, FN_IP8_17_16, FN_IP8_18, FN_IP8_19,
141
142 /* GPSR5 */
143 FN_A1, FN_A2, FN_A3, FN_A4,
144 FN_A5, FN_A6, FN_A7, FN_A8,
145 FN_A9, FN_A10, FN_A11, FN_A12,
146 FN_A13, FN_A14, FN_A15, FN_A16,
147 FN_RD, FN_WE0, FN_WE1, FN_EX_WAIT0,
148 FN_IP3_23, FN_IP3_27, FN_IP3_28, FN_IP2_22,
149 FN_IP2_23, FN_IP2_24, FN_IP2_25, FN_IP2_26,
150 FN_IP2_27, FN_IP3_3, FN_IP3_4, FN_IP3_5,
151
152 /* GPSR6 */
153 FN_IP3_6, FN_IP3_7, FN_IP3_8, FN_IP3_15,
154 FN_IP3_16, FN_IP3_17, FN_IP3_18, FN_IP3_19,
155 FN_IP3_20,
156 PINMUX_FUNCTION_END,
157};
158
159static pinmux_enum_t pinmux_data[] = {
160 PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
161};
162
163static struct pinmux_gpio pinmux_gpios[] = {
164 PINMUX_GPIO_GP_ALL(),
165};
166
167static struct pinmux_cfg_reg pinmux_config_regs[] = {
168 { PINMUX_CFG_REG("GPSR0", 0xfffc0004, 32, 1) {
169 GP_0_31_FN, FN_IP3_31_29,
170 GP_0_30_FN, FN_IP3_26_24,
171 GP_0_29_FN, FN_IP3_22_21,
172 GP_0_28_FN, FN_IP3_14_12,
173 GP_0_27_FN, FN_IP3_11_9,
174 GP_0_26_FN, FN_IP3_2_0,
175 GP_0_25_FN, FN_IP2_30_28,
176 GP_0_24_FN, FN_IP2_21_19,
177 GP_0_23_FN, FN_IP2_18_16,
178 GP_0_22_FN, FN_IP0_30_28,
179 GP_0_21_FN, FN_IP0_5_3,
180 GP_0_20_FN, FN_IP1_18_15,
181 GP_0_19_FN, FN_IP1_14_11,
182 GP_0_18_FN, FN_IP1_10_7,
183 GP_0_17_FN, FN_IP1_6_4,
184 GP_0_16_FN, FN_IP1_3_2,
185 GP_0_15_FN, FN_IP1_1_0,
186 GP_0_14_FN, FN_IP0_27_26,
187 GP_0_13_FN, FN_IP0_25,
188 GP_0_12_FN, FN_IP0_24_23,
189 GP_0_11_FN, FN_IP0_22_19,
190 GP_0_10_FN, FN_IP0_18_16,
191 GP_0_9_FN, FN_IP0_15_14,
192 GP_0_8_FN, FN_IP0_13_12,
193 GP_0_7_FN, FN_IP0_11_10,
194 GP_0_6_FN, FN_IP0_9_8,
195 GP_0_5_FN, FN_A19,
196 GP_0_4_FN, FN_A18,
197 GP_0_3_FN, FN_A17,
198 GP_0_2_FN, FN_IP0_7_6,
199 GP_0_1_FN, FN_AVS2,
200 GP_0_0_FN, FN_AVS1 }
201 },
202 { PINMUX_CFG_REG("GPSR1", 0xfffc0008, 32, 1) {
203 GP_1_31_FN, FN_IP5_23_21,
204 GP_1_30_FN, FN_IP5_20_17,
205 GP_1_29_FN, FN_IP5_16_15,
206 GP_1_28_FN, FN_IP5_14_13,
207 GP_1_27_FN, FN_IP5_12_11,
208 GP_1_26_FN, FN_IP5_10_9,
209 GP_1_25_FN, FN_IP5_8,
210 GP_1_24_FN, FN_IP5_7,
211 GP_1_23_FN, FN_IP5_6,
212 GP_1_22_FN, FN_IP5_5,
213 GP_1_21_FN, FN_IP5_4,
214 GP_1_20_FN, FN_IP5_3,
215 GP_1_19_FN, FN_IP5_2_0,
216 GP_1_18_FN, FN_IP4_31_29,
217 GP_1_17_FN, FN_IP4_28,
218 GP_1_16_FN, FN_IP4_27,
219 GP_1_15_FN, FN_IP4_26,
220 GP_1_14_FN, FN_IP4_25,
221 GP_1_13_FN, FN_IP4_24,
222 GP_1_12_FN, FN_IP4_23,
223 GP_1_11_FN, FN_IP4_22_20,
224 GP_1_10_FN, FN_IP4_19_17,
225 GP_1_9_FN, FN_IP4_16,
226 GP_1_8_FN, FN_IP4_15,
227 GP_1_7_FN, FN_IP4_14,
228 GP_1_6_FN, FN_IP4_13,
229 GP_1_5_FN, FN_IP4_12,
230 GP_1_4_FN, FN_IP4_11,
231 GP_1_3_FN, FN_IP4_10_8,
232 GP_1_2_FN, FN_IP4_7_5,
233 GP_1_1_FN, FN_IP4_4_2,
234 GP_1_0_FN, FN_IP4_1_0 }
235 },
236 { PINMUX_CFG_REG("GPSR2", 0xfffc000c, 32, 1) {
237 GP_2_31_FN, FN_IP10_28_26,
238 GP_2_30_FN, FN_IP10_25_24,
239 GP_2_29_FN, FN_IP10_23_21,
240 GP_2_28_FN, FN_IP10_20_18,
241 GP_2_27_FN, FN_IP10_17_15,
242 GP_2_26_FN, FN_IP10_14_12,
243 GP_2_25_FN, FN_IP10_11_9,
244 GP_2_24_FN, FN_IP10_8_6,
245 GP_2_23_FN, FN_IP10_5_3,
246 GP_2_22_FN, FN_IP10_2_0,
247 GP_2_21_FN, FN_IP9_29_28,
248 GP_2_20_FN, FN_IP9_27_26,
249 GP_2_19_FN, FN_IP9_25_24,
250 GP_2_18_FN, FN_IP9_23_22,
251 GP_2_17_FN, FN_IP9_21_19,
252 GP_2_16_FN, FN_IP9_18_16,
253 GP_2_15_FN, FN_IP9_15_14,
254 GP_2_14_FN, FN_IP9_13_12,
255 GP_2_13_FN, FN_IP9_11_10,
256 GP_2_12_FN, FN_IP9_9_8,
257 GP_2_11_FN, FN_IP9_7,
258 GP_2_10_FN, FN_IP9_6,
259 GP_2_9_FN, FN_IP9_5,
260 GP_2_8_FN, FN_IP9_4,
261 GP_2_7_FN, FN_IP9_3_2,
262 GP_2_6_FN, FN_IP9_1_0,
263 GP_2_5_FN, FN_IP8_30_28,
264 GP_2_4_FN, FN_IP8_27_25,
265 GP_2_3_FN, FN_IP8_24_23,
266 GP_2_2_FN, FN_IP8_22_21,
267 GP_2_1_FN, FN_IP8_20,
268 GP_2_0_FN, FN_IP5_27_24 }
269 },
270 { PINMUX_CFG_REG("GPSR3", 0xfffc0010, 32, 1) {
271 GP_3_31_FN, FN_IP6_3_2,
272 GP_3_30_FN, FN_IP6_1_0,
273 GP_3_29_FN, FN_IP5_30_29,
274 GP_3_28_FN, FN_IP5_28,
275 GP_3_27_FN, FN_IP1_24_23,
276 GP_3_26_FN, FN_IP1_22_21,
277 GP_3_25_FN, FN_IP1_20_19,
278 GP_3_24_FN, FN_IP7_26_25,
279 GP_3_23_FN, FN_IP7_24_23,
280 GP_3_22_FN, FN_IP7_22_21,
281 GP_3_21_FN, FN_IP7_20_19,
282 GP_3_20_FN, FN_IP7_30_29,
283 GP_3_19_FN, FN_IP7_28_27,
284 GP_3_18_FN, FN_IP7_18_17,
285 GP_3_17_FN, FN_IP7_16_15,
286 GP_3_16_FN, FN_IP12_17_15,
287 GP_3_15_FN, FN_IP12_14_12,
288 GP_3_14_FN, FN_IP12_11_9,
289 GP_3_13_FN, FN_IP12_8_6,
290 GP_3_12_FN, FN_IP12_5_3,
291 GP_3_11_FN, FN_IP12_2_0,
292 GP_3_10_FN, FN_IP11_29_27,
293 GP_3_9_FN, FN_IP11_26_24,
294 GP_3_8_FN, FN_IP11_23_21,
295 GP_3_7_FN, FN_IP11_20_18,
296 GP_3_6_FN, FN_IP11_17_15,
297 GP_3_5_FN, FN_IP11_14_12,
298 GP_3_4_FN, FN_IP11_11_9,
299 GP_3_3_FN, FN_IP11_8_6,
300 GP_3_2_FN, FN_IP11_5_3,
301 GP_3_1_FN, FN_IP11_2_0,
302 GP_3_0_FN, FN_IP10_31_29 }
303 },
304 { PINMUX_CFG_REG("GPSR4", 0xfffc0014, 32, 1) {
305 GP_4_31_FN, FN_IP8_19,
306 GP_4_30_FN, FN_IP8_18,
307 GP_4_29_FN, FN_IP8_17_16,
308 GP_4_28_FN, FN_IP0_2_0,
309 GP_4_27_FN, FN_PENC1,
310 GP_4_26_FN, FN_PENC0,
311 GP_4_25_FN, FN_IP8_15_12,
312 GP_4_24_FN, FN_IP8_11_8,
313 GP_4_23_FN, FN_IP8_7_4,
314 GP_4_22_FN, FN_IP8_3_0,
315 GP_4_21_FN, FN_IP2_3_0,
316 GP_4_20_FN, FN_IP1_28_25,
317 GP_4_19_FN, FN_IP2_15_12,
318 GP_4_18_FN, FN_IP2_11_8,
319 GP_4_17_FN, FN_IP2_7_4,
320 GP_4_16_FN, FN_IP7_14_13,
321 GP_4_15_FN, FN_IP7_12_10,
322 GP_4_14_FN, FN_IP7_9_7,
323 GP_4_13_FN, FN_IP7_6_4,
324 GP_4_12_FN, FN_IP7_3_2,
325 GP_4_11_FN, FN_IP7_1_0,
326 GP_4_10_FN, FN_IP6_30_29,
327 GP_4_9_FN, FN_IP6_26_25,
328 GP_4_8_FN, FN_IP6_24_23,
329 GP_4_7_FN, FN_IP6_22_20,
330 GP_4_6_FN, FN_IP6_19_18,
331 GP_4_5_FN, FN_IP6_17_15,
332 GP_4_4_FN, FN_IP6_14_12,
333 GP_4_3_FN, FN_IP6_11_9,
334 GP_4_2_FN, FN_IP6_8,
335 GP_4_1_FN, FN_IP6_7_6,
336 GP_4_0_FN, FN_IP6_5_4 }
337 },
338 { PINMUX_CFG_REG("GPSR5", 0xfffc0018, 32, 1) {
339 GP_5_31_FN, FN_IP3_5,
340 GP_5_30_FN, FN_IP3_4,
341 GP_5_29_FN, FN_IP3_3,
342 GP_5_28_FN, FN_IP2_27,
343 GP_5_27_FN, FN_IP2_26,
344 GP_5_26_FN, FN_IP2_25,
345 GP_5_25_FN, FN_IP2_24,
346 GP_5_24_FN, FN_IP2_23,
347 GP_5_23_FN, FN_IP2_22,
348 GP_5_22_FN, FN_IP3_28,
349 GP_5_21_FN, FN_IP3_27,
350 GP_5_20_FN, FN_IP3_23,
351 GP_5_19_FN, FN_EX_WAIT0,
352 GP_5_18_FN, FN_WE1,
353 GP_5_17_FN, FN_WE0,
354 GP_5_16_FN, FN_RD,
355 GP_5_15_FN, FN_A16,
356 GP_5_14_FN, FN_A15,
357 GP_5_13_FN, FN_A14,
358 GP_5_12_FN, FN_A13,
359 GP_5_11_FN, FN_A12,
360 GP_5_10_FN, FN_A11,
361 GP_5_9_FN, FN_A10,
362 GP_5_8_FN, FN_A9,
363 GP_5_7_FN, FN_A8,
364 GP_5_6_FN, FN_A7,
365 GP_5_5_FN, FN_A6,
366 GP_5_4_FN, FN_A5,
367 GP_5_3_FN, FN_A4,
368 GP_5_2_FN, FN_A3,
369 GP_5_1_FN, FN_A2,
370 GP_5_0_FN, FN_A1 }
371 },
372 { PINMUX_CFG_REG("GPSR6", 0xfffc001c, 32, 1) {
373 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
374 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
375 0, 0, 0, 0, 0, 0, 0, 0,
376 0, 0,
377 0, 0,
378 0, 0,
379 GP_6_8_FN, FN_IP3_20,
380 GP_6_7_FN, FN_IP3_19,
381 GP_6_6_FN, FN_IP3_18,
382 GP_6_5_FN, FN_IP3_17,
383 GP_6_4_FN, FN_IP3_16,
384 GP_6_3_FN, FN_IP3_15,
385 GP_6_2_FN, FN_IP3_8,
386 GP_6_1_FN, FN_IP3_7,
387 GP_6_0_FN, FN_IP3_6 }
388 },
389 { PINMUX_CFG_REG("INOUTSEL0", 0xffc40004, 32, 1) { GP_INOUTSEL(0) } },
390 { PINMUX_CFG_REG("INOUTSEL1", 0xffc41004, 32, 1) { GP_INOUTSEL(1) } },
391 { PINMUX_CFG_REG("INOUTSEL2", 0xffc42004, 32, 1) { GP_INOUTSEL(2) } },
392 { PINMUX_CFG_REG("INOUTSEL3", 0xffc43004, 32, 1) { GP_INOUTSEL(3) } },
393 { PINMUX_CFG_REG("INOUTSEL4", 0xffc44004, 32, 1) { GP_INOUTSEL(4) } },
394 { PINMUX_CFG_REG("INOUTSEL5", 0xffc45004, 32, 1) { GP_INOUTSEL(5) } },
395 { PINMUX_CFG_REG("INOUTSEL6", 0xffc46004, 32, 1) {
396 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
397 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
398 0, 0, 0, 0, 0, 0, 0, 0,
399 0, 0,
400 0, 0,
401 0, 0,
402 GP_6_8_IN, GP_6_8_OUT,
403 GP_6_7_IN, GP_6_7_OUT,
404 GP_6_6_IN, GP_6_6_OUT,
405 GP_6_5_IN, GP_6_5_OUT,
406 GP_6_4_IN, GP_6_4_OUT,
407 GP_6_3_IN, GP_6_3_OUT,
408 GP_6_2_IN, GP_6_2_OUT,
409 GP_6_1_IN, GP_6_1_OUT,
410 GP_6_0_IN, GP_6_0_OUT, }
411 },
412 { },
413};
414
415static struct pinmux_data_reg pinmux_data_regs[] = {
416 { PINMUX_DATA_REG("INDT0", 0xffc40008, 32) { GP_INDT(0) } },
417 { PINMUX_DATA_REG("INDT1", 0xffc41008, 32) { GP_INDT(1) } },
418 { PINMUX_DATA_REG("INDT2", 0xffc42008, 32) { GP_INDT(2) } },
419 { PINMUX_DATA_REG("INDT3", 0xffc43008, 32) { GP_INDT(3) } },
420 { PINMUX_DATA_REG("INDT4", 0xffc44008, 32) { GP_INDT(4) } },
421 { PINMUX_DATA_REG("INDT5", 0xffc45008, 32) { GP_INDT(5) } },
422 { PINMUX_DATA_REG("INDT6", 0xffc46008, 32) {
423 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
424 0, 0, 0, 0, 0, 0, 0, GP_6_8_DATA,
425 GP_6_7_DATA, GP_6_6_DATA, GP_6_5_DATA, GP_6_4_DATA,
426 GP_6_3_DATA, GP_6_2_DATA, GP_6_1_DATA, GP_6_0_DATA }
427 },
428 { },
429};
430
431static struct resource r8a7779_pfc_resources[] = {
432 [0] = {
433 .start = 0xfffc0000,
434 .end = 0xfffc023b,
435 .flags = IORESOURCE_MEM,
436 },
437 [1] = {
438 .start = 0xffc40000,
439 .end = 0xffc46fff,
440 .flags = IORESOURCE_MEM,
441 }
442};
443
444static struct pinmux_info r8a7779_pinmux_info = {
445 .name = "r8a7779_pfc",
446
447 .resource = r8a7779_pfc_resources,
448 .num_resources = ARRAY_SIZE(r8a7779_pfc_resources),
449
450 .unlock_reg = 0xfffc0000, /* PMMR */
451
452 .reserved_id = PINMUX_RESERVED,
453 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
454 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
455 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
456 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
457
458 .first_gpio = GPIO_GP_0_0,
459 .last_gpio = GPIO_GP_6_8,
460
461 .gpios = pinmux_gpios,
462 .cfg_regs = pinmux_config_regs,
463 .data_regs = pinmux_data_regs,
464
465 .gpio_data = pinmux_data,
466 .gpio_data_size = ARRAY_SIZE(pinmux_data),
467};
468
469void r8a7779_pinmux_init(void)
470{
471 register_pinmux(&r8a7779_pinmux_info);
472}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-05 18:57:11 -0500